| Age | Commit message (Collapse) | Author |
|---|
|
This file is common for all K3, move it out of board/ directory and
into mach-k3. As we need to change the path in k3-binman.dtsi let's
take this opportunity to switch to absolute paths which makes adding
non-TI boards (like Toradex Verdin) not need to override these paths.
Signed-off-by: Andrew Davis <[email protected]>
|
|
Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an
clk provider. Also add "#clock-cells=<1>" to its device tree node.
Add "i2c_root" to clk_test in the device tree and driver for testing.
Get "i2c_root" clock in CCF unit tests and add tests for it.
Signed-off-by: Yang Xiwen <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.
Tested-by: Patrice Chotard <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Signed-off-by: Igor Prusov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
Move clock dump function in preparation for switching to dump function
in clk_ops.
Acked-by: Michal Simek <[email protected]>
Signed-off-by: Igor Prusov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
Unlike Linux, the DSI driver requires the LTDC clock to be properly
probed. Hence, the changes made to the DSI node.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.
This patch is preparatory for future developments that require the use
of the DSI clock.
[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.
This patch is preparatory for future developments that require the use
of the LTDC clock.
[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Sync the devicetree with linux 6.5 for stm32f746-disco board.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
With commit f479f5dbb7ac ("ARM: dts: stm32: add ltdc support on
stm32f746 MCU"), which adds the 'ltdc' node in stm32f746.dtsi, we can
simplify stm32f769-disco-uboot.dtsi and align stm32f769-disco.dtsi with
the kernel version.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Add PLL settings for DDR 3600 MTps . This is very similar to 3200 MTps
PLL setting, except the divider is not 9 but 8 .
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Inhibit DTC warning in imx8mp-dhcom-pdk3-overlay-rev100.dts:
"
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (reg_format): /fragment@0/__overlay__:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #address-cells value
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #size-cells value
"
The DTO overwrites the 'reg' property of an ethernet PHY and is only
used on specific combination of old prototype SoM and old prototype
PDK3 carrier board, which had incorrectly placed pull resistor, which
made the PHY change its MDIO address in that specific combination and
which is already fixed on production hardware.
The DTO is implemented in this simple manner because if it contained a
full MDIO bus node reference to define #address-cells and #size-cells,
it would also require a full new copy of the PHY node, i.e.
ethernet-phy@5 { ... reg = <5>; ... }, to avoid DTC warnings about
mismatch between node unit and reg value. The node unit in SoM DT is
ethernet-phy@7 { ... }; .
This simpler approach avoids unnecessary duplication without adverse
side effects.
Reported-by: Fabio Estevam <[email protected]>
Reported-by: Sean Anderson <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Tested-by: Sean Anderson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2024.04-rc1
zynqmp:
- Introduce Kria specific defconfig
- Calculate SPI image location based on boot offset
- DT updates
zynqmp-clk:
- Fix topsw_lsbus_clock for DP
axi-enet:
- Support older DT binding
mailbox:
- Add support for multiple mailboxes
pcie-xilinx:
- Covert driver to newer interface
- Enable MMIO region
zynq:
- dfu updates
- Enable capsule update for Antminer S9
- DT updates
xilinx_spi:
- Add new xfer callback and support runtime fifo depth discovery
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
- Add TPM support for venice boards
- Add networking support for imx93-evk
- Enable TCP, IPv6, wget for DHCOM and Data Modul boards
- Enable fastboot support for Toradex boards
- Allow pico-imx7d to boot from SD
- Enable fastboot for beacon imx8m beacon boards, disabled
SYS_CONSOLE_IS_IN_ENV
- Fix mxsboot to prevent NAND blocks being reported as bad
- Add imx8mm PWM clock support
- Several devicetree syncs with the kernel
- Add support for i.MX8MP Polyhex Debix Model A SBC
- Reworked ddr_load_train_firmware() to get a 50ms boot time improvement
|
|
Move the DM entry in tispl.bin FIT image from default fetching an
external blob entry to fetching using ti-dm entry type. This way, the
DM entry will be populated by the TI_DM pathname if provided. Else it
will resort to the ti-dm.bin file.
Signed-off-by: Neha Malcom Francis <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Add basic sandbox support for 'booti' so we can start to boot the test
ARMbian image. This is helpful in checking that it is parsed correctly.
Signed-off-by: Simon Glass <[email protected]>
|
|
The of_size parameter is not used, so remove it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Function acpi_get_rsdp_addr() is needed on all architectures which
write ACPI tables. Move the definition from the x86 include to an
architecture independent one.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Technexion PICO-IMX7 SoM is supporting USDHC3 (eMMC or micro SD on SoM)
and USDHC1 (SD on carrier board) to use on any carrier board like
PICO-NYMPH. Based on the U-Boot version from Technexion it adds
baseboard SD card boot detect to able to boot from selected USDHC1
or USDHC3 boot devices.
Signed-off-by: Benjamin Szőke <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
|
|
Selecting CONFIG_IMX_HAB=y on a SPL target, such as apalis_imx6_defconfig,
for example, leads to the following build error:
/usr/bin/arm-linux-gnueabihf-ld.bfd: arch/arm/mach-imx/hab.o: in function `imx_hab_is_enabled':
arch/arm/mach-imx/hab.c:879: undefined reference to `fuse_read'
fuse_read() comes from SPL_MXC_OCOTP, which depends on SPL_DRIVERS_MISC,
since commit 251a3053b1e6 ("misc: imx: remove DM dependency for ocotp
driver in SPL").
Select SPL_DRIVERS_MISC in the SPL case to fix this build issue.
Reported-by: Lisandro Pérez Meyer <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Tested-by: Lisandro Pérez Meyer <[email protected]>
|
|
The MXS starts with CPSR V bit set, which makes the CPU jump to high vectors
in case of an exception. Those high vectors are located at 0xffff0000, which
is where the BootROM exception table is located as well. U-Boot should handle
exceptions on its own using its own exception handling code, which is located
at 0x0, i.e. at low vectors. Clear the CPSR V bit, so that the CPU would jump
to low vectors on exception instead, and therefore run the U-Boot exception
handling code.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
To quote the author:
It would be useful to be able to boot an OS when CONFIG_CMDLINE is
disabled. This could allow reduced code size.
Standard boot provides a way to handle programmatic boot, without
scripts, so such a feature is possible. The main impediment is the
inability to use the booting features of U-Boot without a command line.
So the solution is to avoid passing command arguments and the like to
code in boot/
A similar process has taken place with filesystems, for example, where
we have (somewhat) separate Kconfig options for the filesystem commands
and the filesystems themselves.
This series starts the process of refactoring the bootm logic so that
it can be called from standard boot without using the command line.
Mostly it removes the use of argc, argv and cmdtbl from the internal
logic.
Some limited tidy-up is included, but this is kept to smaller patches,
rather than trying to remove all #ifdefs etc. Some function comments
are added, however.
A simple programmatic boot is provided as a starting point.
This work will likely take many series, so this is just the start.
Size growth with this series for firefly-rk3288 (Thumb2) is:
arm: (for 1/1 boards) all +23.0 rodata -49.0 text +72.0
This should be removed by:
https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/11
but it is not included in this series as it is already large enough.
No functional change is intended in this series.
Changes in v3:
- Add a panic if programmatic boot fails
- Drop RFC tag
Changes in v2:
- Add new patch to adjust position of unmap_sysmem() in boot_get_kernel()
- Add new patch to obtain command arguments
- Fix 'boot_find_os' typo
- Pass in the command name
- Use the command table to provide the command name, instead of "bootm"
|
|
Since we can now cleanly disable CMDLINE when needed, drop the rules
which discard the command code. It will not be built in the first
place.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
The aliases are currently indented using spaces.
Fix it to use the standard tab indentation.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
When CONFIG_DWC_ETH_QOS_IMX=y and CONFIG_FEC_MXC is not selected, the
following warning is seen:
arch/arm/mach-imx/imx8m/clock_imx8mm.c: In function 'board_interface_eth_init':
arch/arm/mach-imx/imx8m/clock_imx8mm.c:914:24: warning: implicit declaration of function 'imx8mp_fec_interface_init; did you mean 'imx8mp_eqos_interface_init'? [-Wimplicit-function-declaration]
Fix it by adding a stub for imx8mp_fec_interface_init() to handle this
case.
This follows the same approach done on imx8mp_eqos_interface_init().
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
With DM enabled, there is no need for board code to initialize
the Ethernet interfaces.
The RTL8211FDI Ethernet PHYs have 25MHz oscillator, so there is no
need to enable the RGMII TX clk output.
Also, there is no need for describing the deprecated phy-reset FEC
properties, nor passing reset properties to the EQOS interface in
u-boot.dtsi.
Remove all these unneeded pieces.
Tested both Ethernet interfaces after these changes.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Hugo Villeneuve <[email protected]>
|
|
Sync imx8mp.dtsi and imx8mp-clock.h with linux-next 20231019.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
Sync imx8mn.dtsi with linux-next 20231019.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
Sync imx8mm.dtsi with linux-next 20231019.
The motivation for doing this sync was a bug when doing "ums 0 mmc 1"
on imx8mm-evk. It worked well for the first time, but after doing
a CTRL+C and launching the ums again, the command did not work.
Adam Ford suggested to sync imx8mm.dtsi with the Linux dts, as there was
a recent USB power domain reorganization there.
After syncing the imx8mm.dtsi with Linux, the ums command works without
problem after a CTRL+C.
Suggested-by: Adam Ford <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Tim Harvey <[email protected]>
|
|
Currently, the imx8mp_evk uses the non-DM code to initialize the PMIC.
Convert to DM_PMIC, which is the recommended way to access the PMIC.
While at it, fix multi-line comments style.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
Add the TPM device found on the GW73xx revision F PCB.
This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Add the TPM device found on the GW73xx revision F PCB.
This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Add Variscite manufacturer to the IMX8MN_VAR_SOM target menu label as
the majority of targets include the manufacturer as part of their menu
description/label and it helps when looking for a particular
manufacturer/board.
Signed-off-by: Hugo Villeneuve <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
The correct compatible string for i.MX93 variant of DWC EQoS MAC is now
"nxp,imx93-dwmac-eqos".
Signed-off-by: Sébastien Szymanski <[email protected]>
|
|
Add a common board_interface_eth_init() called by the DWC MAC driver to
setup the MAC <-> PHY interface according to the PHY mode obtained from
DT.
Remove the board-side configuration in the i.MX93 EVK files.
Signed-off-by: Sébastien Szymanski <[email protected]>
|
|
Change boot device logic to also allow environment stored in fat and
in ext4 when booting from SD or eMMC.
As the boot device check for SD and for eMMC was depending on
ENV_IS_IN_MMC being defined, change the ifdef blocks at
env_get_location to use IS_ENABLED instead for all modes, returning
NOWHERE when no valid mode is found.
Signed-off-by: Ricardo Salveti <[email protected]>
Co-developed-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Oleksandr Suvorov <[email protected]>
|
|
Move an OEM closing logic to ahab_close() function to be able to use
it directly without calling a u-boot command.
Signed-off-by: Igor Opaniuk <[email protected]>
Co-developed-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Oleksandr Suvorov <[email protected]>
|
|
The interrupt collector macro name for i.MX23 is MXS_ICOLL_BASE,
this is correct and matches the documentation of both i.MX23 and
i.MX28. Align the i.MX28 macro accordingly. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
|
|
Sync the devicetree files used in the kernel for the imx8mm-phyboard-polis
with the corresponding devicetree files in U-Boot.
Replaced phycore-imx8mm.dts with kernel dts imx8mm-phyboard-polis-rdk.dts
Synced with kernel 6.5.0-rc1 commit
e752a4f9589c (arm64: dts: freescale: imx8mm-phyboard: Add I2C4 pinmuxing)
Signed-off-by: Cem Tenruh <[email protected]>
|
|
Commit 0aea5dda2928 ("ARM: dts: imx7d-sdb-u-boot: Fix usdhc1 UHS
operation") did a temporary workaround by addng the usdhc1 fix
inside the -u-boot.dtsi file.
The imx7d-sdb.dts from kernel 6.5-rc1 contains the proper UHS
fix, so sync the devicetree tree and remove the previous fix
from -u-boot.dtsi.
Also, adjust the PMIC node name inside pmic_get() to match
the devicetree update.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
Add support for the Polyhex Debix Model A SBC board.
It is an industrial grade single board computer based on
NXP's i.MX 8M Plus.
Currently supported interfaces are:
- Serial console
- Micro SD
- eQOS and FEC Ethernet
imx8mp-debix-model-a.dts is taken from Linux 6.3.
Signed-off-by: Gilles Talis <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
The commit in linux kernel 81186dc16101 ("dt-bindings: zynqmp: add
destination mailbox compatible") make compatible string for child nodes
mandatory that's why add it.
Signed-off-by: Tanmay Shah <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
|
|
Based on DT specification device_type property is deprecated and should be
used only for cpu and memory nodes. That's why remove other usage. In this
case ethernet-phy.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/70201ca4ad49ace6f7c27015af9df58a335d2a1f.1700831800.git.michal.simek@amd.com
|
|
8T49N240 driver was never upstreamed by IDT and there is no user of this
driver that's why remove description for this chip with also remove this
driver.
Reviewed-by: Radhey Shyam Pandey <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/52aec21f121713160d5953b0a41a10cb196482b3.1699428990.git.michal.simek@amd.com
|
|
Upstream dwc3 U-Boot driver is not able to handle child nodes properly
that's why comment them in DT for now. This patch should be reverted when
dwc3 driver handles it properly.
DT node itself is aligned with dt schema.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/537c91a7ac0843358c4e33aa10d9e035d8e92faf.1699286139.git.michal.simek@amd.com
|
|
The aliases and chosen nodes are currently indented using spaces.
Fix them to use the standard tab indentation.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset
Signed-off-by: Fabio Estevam <[email protected]>
|
|
USB host interface is not working on some Apalis Toradex carrier
boards with Apalis iMX8 SoM. This is due to USBH_EN pin, which
powers USB peripherals, having a strong pull-down on some boards,
and a weak pull-down on the others. This USBH_EN pin is left
unconfigured, which means it is in its default state at cold boot:
input with a strong pull-up. As a result, carrier boards with a
weak pull-down have this signal high enough to trigger power
delivery to USB peripherals, and opposite - boards with strong
pull-down on USBH_EN have this signal below the threshold needed
to trigger USB power delivery.
This change configures the USBH_EN pin as gpio hog, fixing this
issue for all Apalis carrier boards regardless of pull-down
resistor value.
Also, update apalis-imx8_defconfig via savedefconfig.
Signed-off-by: Andrejs Cainikovs <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
On branch WIP/17Oct2023, the EEPROM can no longer be read:
U-Boot 2023.10-latest (Oct 17 2023 - 15:53:43 -0400)
CPU: Freescale i.MX8MNano Quad rev1.0 at 1200 MHz
Reset cause: POR
Model: Variscite VAR-SOM-MX8MN Symphony evaluation board
var_read_som_eeprom: uclass_get_device_by_of_offset() failed: -19
initcall failed at call 000000004022207c (err=-19)
Convert EEPROM-related properties to bootph-all so that the EEPROM can
also be read outside of SPL.
Fixes: 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Hugo Villeneuve <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
- StarFive: Add StarFive watchdog driver
- VisionFive2: Support device tree overlay for VisionFive2 board
- Andes: Fix PLIC-SW setting
- RISC-V: Fix NVMe support by implying NVME_PCI for QEMU
- RISC-V: Fix binman for 64 bit format load address
|
|
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which
was not used by any driver at the time. The display out exposed as
simple-framebuffer use a power-domain controlled by a device in an
unmapped region.
Add a map covering this region as well as another MMIO region in the
range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO
annotated in Apple's device tree in this range.
Signed-off-by: Janne Grunau <[email protected]>
Reviewed-by: Eric Curtin <[email protected]>
Reviewed-by: Neal Gompa <[email protected]>
Reviewed-by: Mark Kettenis <[email protected]>
|
