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2023-10-09arm64: zynqmp: Add support for vpk120-revAMichal Simek
Board contains two systems. The primary is Versal VP1202 ACAP device and the secondary is ZynqMP zu4 which acts as system controller. The patch is describing only ZynqMP system controller part. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/bd8b79d7c6693e90e12bce422f8ed00f2f43c9ae.1695808407.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Add x-prc-01/02/03/04/05 revA support from SCMichal Simek
Add i2c accessible devices with description. There is versal specific eeprom and i2c-gpio controller. SE3 has also clock chip present. Also remove x-prc description from SC dts. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/4f71ec6a63240fd4aaa3453824138281c50d71c3.1695808407.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Add support for vck190 revB system controllerMichal Simek
There are some changes between revA and revB boards. u39 8T49N240 was removed and also three ina226 at 42/43/44 addresses (u178/u180/u182). Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/461cfe5b2b882365413f90d19efd8abcd6be56ed.1695808407.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Remove xlnx,fclk nodesMichal Simek
xlnx,fclk nodes are not described in dtschema that's why remove them. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/b25dedd066f587321751d7d20c1f65bb96c53b89.1695808407.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Add support for KD240 Kria SOM CCMichal Simek
Add support for KD240 Kria SOM CC. It is pretty much subset of KR260 board from PS perspective. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/835f1d1b8982d46b902db69daad64e8445c051e9.1695808407.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Aligned QSPI configuration with latest specMichal Simek
Official DT binding description for dual stacked/paralllel configurations have been merged that's why switch to it. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/2912091c231f5e945ee44601c285fe16263448da.1695378830.git.michal.simek@amd.com
2023-10-09ARM: zynq: Describe nand device in DTMichal Simek
Linux requires to describe nand structure under nand controller. If it is not described nand device is not detected by Linux. Error shown by Linux kernel: pl35x-nand-controller e1000000.nand-controller: Incorrect number of NAND chips (0) pl35x-nand-controller: probe of e1000000.nand-controller failed with error -22 When wired: nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda nand: Micron MT29F2G08ABAEAWP nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/3fcd68ccdfed5e6c079681e3b29e06583ec8a375.1695378830.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Sync licenses with Linux kernelMichal Simek
There is difference between licenses in the Linux kernel and there shouldn't be any diff because all changes are coming from the same source at the same time. The difference is really in a time when they were upstreamed. That's why sync it up. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/813b29378083153b67c60772f28cd2613519f338.1695378830.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Convert kv260-revA overlay to ASCII textMichal Simek
File was in UTF-8 format but there is no reason for it. Convert it to ASCII/plain text. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/e4d52b898b461b86bb82009f37635f351279c753.1695378830.git.michal.simek@amd.com
2023-10-09arm64: dts: zynqmp: Add ports for the DisplayPort subsystemLaurent Pinchart
The DPSUB DT bindings now specify ports to model the connections with the programmable logic and the DisplayPort output. Add them to the device tree. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: Michal Simek <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/1c91420e90bc823d7529834c33438216857c7161.1695378830.git.michal.simek@amd.com
2023-10-09arm64: dts: zynqmp: zcu106a: Describe DisplayPort connectorLaurent Pinchart
Add a device tree node to describe the DisplayPort connector, and connect it to the DPSUB output. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/fe037c93ed41bc5ca97887964037520d449ca98c.1695378830.git.michal.simek@amd.com
2023-10-09arm64: xilinx: Remove address/size-cells from gem nodesMichal Simek
Some boards are using one mdio bus which holds multiple phys and also boards are using mdio node for bus description. That's why there are cases where address/size-cells are unnecessary which is also reported by make W=1 dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle it based on used description. Error log: /axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/02f308c774d4f2a798a9a8c066824114a19841a7.1695378830.git.michal.simek@amd.com
2023-10-09arm64: xilinx: Put ethernet phys to mdio nodeMichal Simek
All zynqmp boards have been already described via mdio node that's why also convert the rest of the boards. With using mdio node there is an option to add reset property for the whole mdio bus which is reflected by 's/phy-reset-gpios/reset-gpios/g' for some boards. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/ff165281a70a38e2b76fee91e6255ce95ce8021b.1695378830.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Fix Siva's email address formatMichal Simek
Some patches didn't have his full name and also there was one more ">" at the end of email address. That's why correct both of these issues. Fixes: 174d728471d5 ("arm64: zynqmp: Switch to amd.com emails") Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Describe bus-width for SD card on KV260Michal Simek
SD card is connected with 4 data lines which should be described properly. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/065cb9f1c6706eb4d70066e25cfc30d17b9f875d.1695378830.git.michal.simek@amd.com
2023-10-09arm64: xilinx: Use lower case for partition addressMichal Simek
Lower case should be used for register address. Issue is reported as: flash@0: partitions: Unevaluated properties are not allowed ('partition@22A0000' was unexpected) Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/66b3361df883ecab4f36ce3b4196fb606c802598.1695378830.git.michal.simek@amd.com
2023-10-09arm64: xilinx: Remove address/size-cells from flash nodeMichal Simek
Partitions are described via fixed-partitions that's why there is no need to have address/size-cells in flash node. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c704be9d9f3d09c1cc55b092efeb9c73fcda6451.1695378830.git.michal.simek@amd.com
2023-10-09arm64: dts: xilinx: zynqmp: Add RPU subsystem device nodeTanmay Shah
RPU subsystem can be configured in cluster-mode or split mode. Also each r5 core has separate power domains. Signed-off-by: Tanmay Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/dde364939b4fbe3f7be7b6f5dff42e7d8b2f5c46.1695378830.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Describe interrupts by using macrosMichal Simek
Use arm-gic.h and irq.h for interrupt description. It helps to improve readability of device tree file. Suggested-by: Laurent Pinchart <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/e0db567e1eb4e4e90e59270f41708919682dacf4.1695378830.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Rename dt overlay file names from dts to dtsoMichal Simek
Use dtso suffix instead of dts. Build option was introduced by commit a0f9a77912b2 ("kbuild: Allow DTB overlays to built from .dtso named source files"). Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/1dce37e72428c14a3ccbb5dc674b90dfe56b75ac.1695046155.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Describe assigned-clocks for uartsMichal Simek
Describe assigned-clocks for both uarts. SOM is using this functionality. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/bddbb81209a4567b0939c5d2d0ecb42fdfcd71ea.1695036114.git.michal.simek@amd.com
2023-10-08Merge tag 'u-boot-rockchip-20231007' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add Board: rk3568 Bananapi R2Pro; - Update pcie bifurcation support; - dwc_eth_qos controller support for rk3568 and rk3588; - Compressed binary support for U-Boot on rockchip platform; - dts and config updates for different board and soc; [ trini: Fix conflict on include/spl.h ] Signed-off-by: Tom Rini <[email protected]>
2023-10-07rockchip: rk356x-u-boot: Add bootph-all to i2c0_xfer pinctrl nodeJonas Karlman
A RK8XX PMIC is typically using i2c0 on RK356x devices. Add bootph-all to required pinctrl nodes to simplify use of the prevent booting on power plug-in option in SPL. With the following Kconfig options and nodes in u-boot.dtsi the prevent booting on power plug-in option can work in SPL. CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_PMIC_RK8XX=y &i2c0 { bootph-pre-ram; }; &rk817 { bootph-pre-ram; regulators { bootph-pre-ram; }; }; Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07arm: dts: rockchip: rock-5b: add support for PCIe3 and NVMeFUKAUMI Naoki
this patch adds support for PCIe3 (M.2 M key) and enables NVMe. => pci BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1d87 0x3588 Bridge device 0x04 01.00.00 0x10ec 0x8125 Network controller 0x00 02.00.00 0x1d87 0x3588 Bridge device 0x04 03.00.00 0x1179 0x011a Mass storage controller 0x08 => nvme scan => nvme info Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN Type: Hard Disk Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512) Signed-off-by: FUKAUMI Naoki <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07arm: dts: rockchip: sync DT for RK3588 series with LinuxFUKAUMI Naoki
Sync the device tree for RK3588 series with Linux 6.6-rc1. Signed-off-by: FUKAUMI Naoki <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07board: rockchip: Add Bananapi R2Pro BoardFrank Wunderlich
Add Bananapi R2 Pro board. tested: - sdcard - both front usb-ports - sata - wan-port lan-ports are connected to mt7531 switch where driver needs to be separated from mtk ethernet-driver. Signed-off-by: Frank Wunderlich <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Jonas Karlman <[email protected]>
2023-10-07rockchip: Add support to generate LZMA compressed U-boot binaryManoj Sai
Add support for generating a LZMA-compressed U-boot binary with the help of binman, if CONFIG_SPL_LZMA is selected. Signed-off-by: Manoj Sai <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07rockchip: Add support to generate GZIP compressed U-boot binaryManoj Sai
Add support for generating a GZIP-compressed U-boot binary with the help of binman, if CONFIG_SPL_GZIP is selected. Signed-off-by: Manoj Sai <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07rockchip: Kconfig: Enable external TPL binary for rk3308Massimo Pegorer
There is no support to initialize DRAM on rk3308 SoC using U-Boot TPL or SPL, and therefore an external TPL binary must be used to package a bootable u-boot-rockchip.bin image. Default ROCKCHIP_EXTERNAL_TPL to yes if ROCKCHIP_RK3308. Remove useless TPL_SERIAL. Signed-off-by: Massimo Pegorer <[email protected]> Tested-by: FUKAUMI Naoki <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07rockchip: board: Add minimal generic RK3566/RK3568 boardJonas Karlman
Add a minimal generic RK3566/RK3568 board that only have eMMC and SDMMC enabled. This defconfig can be used to boot from eMMC or SD-card on most RK3566/RK3568 boards that follow reference board design. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07rockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5SJonas Karlman
Enable missing PCIe Kconfig options now that PCIe bifurcation is fixed to make use of the two on-board RTL8125B and the M.2 slot on NanoPi R5C and NanoPi R5S. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-07rockchip: rk3568-nanopi-r5: Update defconfig for NanoPi R5C and R5SJonas Karlman
Update and sync Kconfig options for NanoPi R5C and NanoPi R5S with other RK3568 boards. SPL_FIT_SIGNATURE is enabled to add a checksum validation of the FIT payload, also add LEGACY_IMAGE_FORMAT to keep boot scripts working. OF_SPL_REMOVE_PROPS, SPL_DM_SEQ_ALIAS and SPL_PINCTRL change ensure pinctrl for eMMC, SD-card and UART2 is applied in SPL. MMC_HS200_SUPPORT and SPL counterpart is enabled to speed up eMMC load times from on-board eMMC 5.1 modules. Drop remaining unused or unsupported options to sync with other RK3568 boards. Also sync device tree from linux v6.4 and drop u-boot,spl-boot-order and use the default from rk356x-u-boot.dtsi. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-10-06pci: serial: Support reading PCI-register size with baseSimon Glass
The PCI helpers read only the base address for a PCI region. In some cases the size is needed as well, e.g. to pass along to a driver which needs to know the size of its register area. Update the functions to allow the size to be returned. For serial, record the information and provided it with the serial_info() call. A limitation still exists in that the size is not available when OF_LIVE is enabled, so take account of that in the tests. Signed-off-by: Simon Glass <[email protected]>
2023-10-06sandbox: Only read the state if we have a state fileSimon Glass
We should not read this unless requested. Make it conditional on the option being provided. Add some debugging to show the state being written. Signed-off-by: Simon Glass <[email protected]>
2023-10-06sandbox: Move reading the RAM buffer into a better placeSimon Glass
This should not happen in the argument-parsing function. Move it to the main program. Add some debugging for reading/writing. Signed-off-by: Simon Glass <[email protected]>
2023-10-06spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LENSimon Glass
Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the malloc pool exists. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Sean Anderson <[email protected]>
2023-10-06tpl: Enable CONFIG_TPL_SYS_MALLOC_F where neededSimon Glass
Enable CONFIG_TPL_SYS_MALLOC_F for boards which have a non-zero value for CONFIG_TPL_SYS_MALLOC_F_LEN Note that the default is yes in most cases, so no changes are needed to board defconfig options. Signed-off-by: Simon Glass <[email protected]>
2023-10-06spl: Enable CONFIG_SPL_SYS_MALLOC_F where neededSimon Glass
Enable CONFIG_SPL_SYS_MALLOC_F for boards which have a non-zero value for CONFIG_SPL_SYS_MALLOC_F_LEN Note that the default is yes in most cases, so no changes are needed to board defconfig options. Signed-off-by: Simon Glass <[email protected]>
2023-10-06spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDRSimon Glass
Rename this so that SPL is first, as per U-Boot convention. Also add PAYLOAD_ since this is where in memory the parameters for the payload have been stored. Signed-off-by: Simon Glass <[email protected]>
2023-10-06spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_...Simon Glass
We like to put the SPL first so it is clear that it relates to SPL. Rename various malloc-related options which have crept in, to stick to this convention. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Marcel Ziswiler <[email protected]> Reviewed-by: Martyn Welch <[email protected]> Reviewed-by: Svyatoslav Ryhel <[email protected]>
2023-10-05Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
+ ae350: modify memory layout and target name + ae350: use generic RISC-V timer driver in S-mode + Support bootstage report for RISC-V + Support C extension exception command for RISC-V + Add Starfive timer support
2023-10-04arm: dts: k3-j721e: Sync with v6.6-rc1Neha Malcom Francis
Sync k3-j721e DTS with kernel.org v6.6-rc1. * Use mcu_timer0 defined in k3-j721e-mcu-wakeup.dtsi and remove timer0, we have its clocks set up in clk-data now * Remove hbmc node as support is buggy and needs to be fixed * Remove aliases and chosen node, use them from Kernel * Remove /delete-property/ and clock-frequency from sdhci, usbss, and mcu_uart nodes as we have them in clk and dev data * Remove dummy_clocks as they are not needed * Remove cpsw node as it is not required since it has been fixed in U-Boot * Remove pcie nodes, they are not needed * Remove mcu_i2c0 as it is used for tps659413 PMIC in j721e-sk for which support is not yet added * Change secproxy nodes to their Linux definitions * Remove overriding of ti,cluster-mode in MAIN R5 to default to lockstep mode same as Kernel * Retain tps6594 node as TPS6594 PMIC support is still under review in the Kernel [1], cleanup will be taken post its merge [1] https://lore.kernel.org/all/[email protected]/ Signed-off-by: Neha Malcom Francis <[email protected]> Reviewed-by: Manorit Chawdhry <[email protected]>
2023-10-04arm: dts: k3-j721e-r5: Clean up inclusion hierarchyNeha Malcom Francis
Get rid of k3-j721e-r5-*-u-boot.dtsi as it is not necessary. Change the inclusion hierarchy to be as follows: k3-j721e-<board>.dts--- - -->k3-j721e-r5-<board>.dts - k3-j721e-<board>-u-boot.dtsi--- Reason for explicitly mentioning the inclusion of -u-boot.dtsi in code although it could've been automatically done by U-Boot is to resolve some of the dependencies that R5 file requires. Also remove duplicate phandles while making this shift as well as remove firmware-loader as it serves no purpose without "phandlepart" property. Signed-off-by: Neha Malcom Francis <[email protected]>
2023-10-04arm: mach-k3: j721e_init: Move clk_k3 probe before loading TIFSNeha Malcom Francis
When setting boot media to load the TIFS binary in legacy boot flow (followed by J721E), get_timer() is called which eventually calls dm_timer_init() to grab the tick-timer, which is mcu_timer0. Since we need to set up the clocks before using the timer, move clk_k3 driver probe before k3_sysfw_loader to ensure we have all necessary clocks set up before. Signed-off-by: Neha Malcom Francis <[email protected]> Reviewed-by: Nishanth Menon <[email protected]> Reviewed-by: Manorit Chawdhry <[email protected]>
2023-10-04arm: mach-k3: j721e: dev-data: Add mcu_timer0 IDNeha Malcom Francis
U-Boot uses mcu_timer0 as the tick-timer, so add it to device list. Signed-off-by: Neha Malcom Francis <[email protected]> Reviewed-by: Manorit Chawdhry <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
2023-10-04arm: dts: k3-am625-beagleplay: Fix BootNishanth Menon
Since commit [1] A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation. To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'. [1] 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Reported-by: Roger Quadros <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Roger Quadros <[email protected]>
2023-10-04arm: dts: k3-am625-sk: Mark dependent nodes for pre-relocation phaseRoger Quadros
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes. main_conf is required for phy_gmii_sel. Mark them as 'bootph-all' so they are available in all pre-relocation phases. Fixes the below dts warnings: <stdout>: Warning (reg_format): /bus@f0000/syscon@100000/phy@4044:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) <stdout>: Warning (reg_format): /bus@f0000/ethernet@8000000/ethernet-ports/port@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) <stdout>: Warning (unit_address_vs_reg): /bus@f0000/syscon@100000: node has a unit name, but no reg or ranges property <stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format' <stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' <stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #address-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #size-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #address-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #size-cells value <stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' <stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size' Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
2023-10-04arm: dts: k3-am625-sk: Fix bootRoger Quadros
Since commit [1] A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation. To fix this we mark all nodes in sk-u-boot.dtsi as 'bootph-all'. [1] 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
2023-10-04arm: dts: k3-am642-sk: Mark dependent nodes for pre-relocation phaseRoger Quadros
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes. Mark them as 'bootph-all' so they are available in all pre-relocation phases. Fixes below dts warnings: <stdout>: Warning (reg_format): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) <stdout>: Warning (unit_address_vs_reg): /bus@f4000/ethernet@8000000/mdio@f00: node has a unit name, but no reg or ranges property <stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format' <stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' <stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default #address-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default #size-cells value <stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' <stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size' <stdout>: Warning (msi_parent_property): /bus@f4000/bus@48000000/dma-controller@485c0100:msi-parent: Could not get phandle node for (cell 0) <stdout>: Warning (msi_parent_property): /bus@f4000/bus@48000000/dma-controller@485c0000:msi-parent: Could not get phandle node for (cell 0) <stdout>: Warning (phys_property): /bus@f4000/ethernet@8000000/ethernet-ports/port@2:phys: Could not get phandle node for (cell 0) Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
2023-10-04arm: dts: k3-am642-sk: Fix bootRoger Quadros
Since commit [1] A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation. To fix this we mark all nodes in sk-u-boot.dtsi as 'bootph-all'. Move cbass_mcu node to -r5-sk.dts as it is only required for R5 SPL. [1] 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
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