| Age | Commit message (Collapse) | Author |
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Add ethernet support
Signed-off-by: Peng Fan <[email protected]>
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Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add basic board codes and defconfig for i.MX93 11x11 EVK board.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add the DTSi file and DT header files for i.MX93 SoC
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.
The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Select env storages according to boot device at runtime
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add bootaux command to support on-demand booting M33 from u-boot.
It kicks M33 via ATF by "bootaux 0x201e0000 0"
Signed-off-by: Peng Fan <[email protected]>
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To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.
The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.
SPL should call the power init in its boot sequence before accessing
above three MIX and USB.
Signed-off-by: Peng Fan <[email protected]>
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Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Use more generic name for S40x msg structure
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.
Signed-off-by: Peng Fan <[email protected]>
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Add AHAB driver for iMX9 to do authentication by calling sentinel API
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
permission to the memory where SPL image runs. Sentinel will set
the memory to RX only after ROM authentication for the OEM
closed part.
2. Init phase will configure TRDC to allow non-secure master to
access DDR. So the peripherals can work in u-boot.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.
Signed-off-by: Peng Fan <[email protected]>
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Add new API to get sentinel FW status and SoC chip info
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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To support more RDC instances on i.MX93, update API to latest
definition.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Support iMX93 communicate with Sentinel
Signed-off-by: Peng Fan <[email protected]>
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Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.
Also include mmc env functions that use ROM API.
Signed-off-by: Peng Fan <[email protected]>
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Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.
Signed-off-by: Jian Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add the pinctrl driver and pinfunc header file to support iMX93
Signed-off-by: Peng Fan <[email protected]>
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Add i.MX9 Kconfig and basic files for the new SoC
Signed-off-by: Peng Fan <[email protected]>
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Add USB2_BOOT type for i.MX8ULP and i.MX9
Signed-off-by: Peng Fan <[email protected]>
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i.MX8MN/P/ULP supports ROM API, they have almost same get_boot_device
implementation, so move to a common file. And when support i.MX9,
no need to include the other function copy.
Since sys_proto.h is included in imx_romapi.c, there will be build
warning for i.MX8M because wdog_regs not defined, so include imx-regs.h
in i.MX8M sys_proro.h
Signed-off-by: Peng Fan <[email protected]>
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Most i.MX implements get_boot_device, move it to common header to
simplify code
Signed-off-by: Peng Fan <[email protected]>
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For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.
And drop the guard with structure definition, there is no need.
Signed-off-by: Peng Fan <[email protected]>
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Move the default mapping of spl_boot_device to weak function of
spl_board_boot_device. So that every board of iMX7/8/8M can overwrite
this function to implement specific mapping.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The SPL SDP is configured as BOOT_DEVICE_BOARD, so when booting from
USB, change its type to BOOT_DEVICE_BOARD, so we can use SDP.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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All the SoCs use mach-imx has CONFIG_MACH_IMX selected, so
the macro could be the gate to build arch/arm/mach-imx to simplify
the rules.
Signed-off-by: Peng Fan <[email protected]>
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With supporting timer_get_boot_us, we can profile boot up time with below
configs and function bootstage_mark_name().
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
Signed-off-by: Jun Nie <[email protected]>
Acked-by: Shawn Guo <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.
Signed-off-by: Oleksandr Suvorov <[email protected]>
Tested-by: Ricardo Salveti <[email protected]>
Tested-by: Adrian Fiergolski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Mailbox driver might be need for Versal and other future platforms.
To remove the dependency, move struct zynqmp_ipi_msg to
zynqmp_firmware.h so that mailbox driver compiles for other platforms
easily.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.
Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
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CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
do it once that's why remove additional ifdefs from arm and risc-v code.
Fixes: 0c303f9a6628 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Link: https://lore.kernel.org/r/f8e3ff9124195cbd957874de9a65ef79760ef5e7.1657183634.git.michal.simek@amd.com
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Using fixed partitions is recommended way how to describe QSPI. Also add
label for qspi flash memory to be able to reference it in future.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a84f7ce8d6472fce66539ba29d31fbaae511d94b.1655732762.git.michal.simek@amd.com
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"#stream-id-cells" was being used with "mmu-masters" for Xen specific
device trees.
With Xen commit 2278d2cbb0b7c1b48b298c6c4c6a7de2271ac928 (Link below)
Xen is able to support smmu bindings in both formats ie :
1. Using iommus (linux format)
2. Using mmu-masters (legacy format).
Thus, "#stream-id-cells" which was used for the legacy format, can be
removed as Xen can use smmu bindings in linux format.
Link: https://www.mail-archive.com/[email protected]/msg101649.html
Signed-off-by: Ayan Kumar Halder <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/1e062acb233dee47cd7dd2429cb482132617cbc8.1655886415.git.michal.simek@amd.com
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There are no references to CONFIG_SOC_DM355 / CONFIG_SOC_DM365 /
CONFIG_SOC_DM644X / CONFIG_SOC_DM646X and the files these Makefile lines
reference have already been dropped.
Signed-off-by: Tom Rini <[email protected]>
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The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of
SPL_TEXT_BASE. Keystone2 HS devices were not using it right either.
Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Read the swrv.txt file from the TI Security Development Tools when
TI_SECURE_DEVICE is enabled. This allows us to set our software
revision in one place and have it used by all the tools that create
TI x509 boot certificates.
Signed-off-by: Andrew Davis <[email protected]>
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The x509 certificate SWRV is currently hard-coded to 0. This need to be
updated to 1 for j721e 1.1, j7200 and am64x. It is don't care for other
k3 devices.
Added new config K3_X509_SWRV to k3. Default is set to 1.
Signed-off-by: Yogesh Siraswar <[email protected]>
Reviewed-by: Dave Gerlach <[email protected]>
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This isn't strictly needed as these firewalls should all be disabled on
GP, but it also doesn't hurt, so do this unconditionally to remove this
use of CONFIG_TI_SECURE_DEVICE.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The first AM6x device was the AM654x, but being the first we named it
just AM6, since more devices have come out with this same prefix we
should switch it to the normal convention of using the full name of the
first compatibility device the series. This makes what device we are
talking about more clear and matches all the K3 devices added since.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The content of these files are only used in SPL builds. The contents are
already ifdef for the same, remove that and only include the whole file
in the build when building for SPL.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The Qualcomm device trees in U-Boot are currently not consistent with
the upstream DTs used in the Linux kernel. While some bindings are
similar to the official specification in the Linux kernel, several
nodes have subtle differences, e.g. the "compatible"s or the exact
specification of memory registers.
This means that some of the Qualcomm-related U-Boot drivers are not
compatible with the Linux DT (and vice versa).
The SPMI node is one such example: the "core" region starts at
0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at
0x0200f800. The end result is normally the same, since the Linux SPMI
driver simply adds the 0x800 internally.
However, commit f5a2d6b4b03a ("spmi: msm: add arbiter version 5
support") imported this behavior into the U-Boot driver, without
adjusting the DB410c/DB820c device trees. This means that the 0x800
offset is now added twice, breaking all SPMI read/write operations:
Failed to find PMIC pon node. Check device tree
Failed to find pm8916_gpios@c000 node.
USB init failed: -6
starting USB...
Bus ehci@78d9000: Failed to find pm8916_gpios@c000 node.
probe failed, error -6
No working controllers found
While the mistake is strictly speaking in the spmi-msm driver, fix the
issue by making the SPMI nodes in the DB410c/DB820c consistent with the
upstream Linux DT instead.
Ideally we should even go a step further by fixing the remaining uses
of custom bindings in the U-Boot drivers and moving to using the Linux
DTs as-is. This would likely avoid such mistakes in the future and
would also make the porting process much easier.
Cc: Dzmitry Sankouski <[email protected]>
Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
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Using CONFIG_IS_ENABLED breaks accessing memory map structure when
doing a A53 SPL build for AM625 and AM642 platforms. This is due to
'abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y''
in which there is no CONFIG_SPL_SOC_K3_AM625/CONFIG_SPL_SOC_K3_AM642
defined in the configuration.
For the A53 SPL builds on these platform to access the memory mapping
which it will need for enabling the mmu/cache it must use #if defined(X)
checks and not CONFIG_IS_ENABLED.
Cc: Suman Anna <[email protected]>
Cc: Neha Francis <[email protected]>
Signed-off-by: Matt Ranostay <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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