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2022-03-18sandbox: Add the handoff header for splSimon Glass
This defines a function declared in handoff.h so add the header. Signed-off-by: Simon Glass <[email protected]>
2022-03-18sandbox: Show a message when writing out the ram bufferSimon Glass
If state is not being written, but RAM is, we should still show a message, so it is clear that this is happening. Signed-off-by: Simon Glass <[email protected]>
2022-03-18Convert CONFIG_ATMEL_LEGACY to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ATMEL_LEGACY Cc: Eugen Hristev <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_AT91_GPIO_PULLUP to KconfigTom Rini
This converts the following to Kconfig: CONFIG_AT91_GPIO_PULLUP Cc: Eugen Hristev <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_AT91SAM9260 et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_AT91SAM9260 CONFIG_AT91SAM9G20 CONFIG_AT91SAM9XE CONFIG_AT91SAM9261 CONFIG_AT91SAM9263 CONFIG_AT91SAM9G45 CONFIG_AT91SAM9M10G45 CONFIG_AT91SAM9N12 CONFIG_AT91SAM9RL CONFIG_AT91SAM9X5 CONFIG_SAM9X60 CONFIG_SAMA7G5 CONFIG_SAMA5D2 CONFIG_SAMA5D3 CONFIG_SAMA5D4 These options are already select'd as needed, so we're just cleaning up files here. Cc: Eugen Hristev <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_AM335X_USB0 et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_AM335X_USB0 CONFIG_AM335X_USB0_MODE CONFIG_AM335X_USB1 CONFIG_AM335X_USB1_MODE We do this by introducing specific options for static configuration of USB0/USB1 in SPL rather than defining CONFIG_AM335X_USBx_MODE to the enum value being used. Furthermore, with how the code is used now we do not need to have OTG mode exposed as an option here, so remove that. Signed-off-by: Tom Rini <[email protected]>
2022-03-18Remove CONFIG_HAS_ETH0 et al symbolsTom Rini
This converts removes the following symbols: CONFIG_HAS_ETH0 CONFIG_HAS_ETH1 CONFIG_HAS_ETH2 CONFIG_HAS_ETH3 This is because at this point, only the ids8313 platform was using the code which was controlled by these symbols. In turn, this code already performs error checking on being able to perform the device tree fixup. Rather than convert these to Kconfig for a single platform, update the code to not need these checks and remove them from all the platforms they were unused on. Reviewed-by: Heiko Schocher <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-03-18powerpc: Move CONFIG_BPTR_VIRT_ADDR out of CONFIG namespaceTom Rini
This is only used in one file, and is never overridden. Move this out of CONFIG namespace. Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_NET_RETRY_COUNT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_NET_RETRY_COUNT Cc: Ramon Fried <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_ARP_TIMEOUT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ARP_TIMEOUT Cc: Ramon Fried <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_A008044_WORKAROUND to KconfigTom Rini
This converts the following to Kconfig: CONFIG_A008044_WORKAROUND Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_A003399_NOR_WORKAROUND to KconfigTom Rini
This converts the following to Kconfig: CONFIG_A003399_NOR_WORKAROUND Signed-off-by: Tom Rini <[email protected]>
2022-03-18Convert CONFIG_ARMV8_SWITCH_TO_EL1 to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ARMV8_SWITCH_TO_EL1 Cc: Alex Nemirovsky <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Michal Simek <[email protected]> Cc: Nobuhiro Iwamatsu <[email protected]> Cc: Simon Goldschmidt <[email protected]> Cc: Tien Fong Chee <[email protected]> Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Michal Simek <[email protected]>
2022-03-18Convert CONFIG_ARMV7_SECURE_BASE et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE Signed-off-by: Tom Rini <[email protected]>
2022-03-18rockchip: Set default LNX_KRNL_IMG_TEXT_OFFSET_BASE to SYS_TEXT_BASEAlper Nebi Yasak
U-Boot can be chainloaded from vendor firmware on ARM64 chromebooks from a GPT partition (roughly the same as in doc/chromium/chainload.rst), but an appropriate image header must be built-in to the U-Boot binary by enabling LINUX_KERNEL_IMAGE_HEADER. This header has a field for an image load offset from 2MiB alignment which must also be customized through LNX_KRNL_IMG_TEXT_OFFSET_BASE. Set it equal to SYS_TEXT_BASE by default for Rockchip boards, which happens to make this offset zero and works fine on chromebook_kevin both for chainloading and bare-metal use. Signed-off-by: Alper Nebi Yasak <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2022-03-18rockchip: rk3399: Add support for chromebook_kevinMarty E. Plummer
Add support for Kevin, an RK3399-based convertible chromebook that is very similar to Bob. This patch is mostly based on existing support for Bob, with only minor changes for Kevin-specific things. Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV, so adjust it here in the dts as well. The rk3399-gru-kevin devicetree has an unknown event code reference which has to be defined, set it to the Linux counterpart. The new defconfig is copied from Bob with the diffconfig: DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin" DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb" VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400 VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600 +TARGET_CHROMEBOOK_KEVIN y With this Kevin can boot from SPI flash to a usable U-Boot prompt on the display with the keyboard working, but cannot boot into Linux for unknown reasons. eMMC starts in a working state but fails to re-init, microSD card works but at a lower-than-expected speed, USB works but causes a hang on de-init. There are known workarounds to solve eMMC and USB issues. Cc: Marty E. Plummer <[email protected]> Cc: Simon Glass <[email protected]> [Alper: commit message, resync config with Bob, update MAINTAINERS, add to Rockchip doc, add Kconfig help message, set regulator] Co-developed-by: Alper Nebi Yasak <[email protected]> Signed-off-by: Alper Nebi Yasak <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Simon Glass <[email protected]> Tested-by: Simon Glass <[email protected]>
2022-03-18rockchip: gru: Add more devicetree settingsSimon Glass
This adds some devicetree settings for the Gru-based boards, based on what works on a Kevin board. Gru-based boards usually have an 8MiB SPI flash chip and boot from it. Make the u-boot.rom file intended to be flashed on it match its size. Add properties for booting from SPI, and only try to boot from SPI as MMC and SD card don't seem to work in SPL yet. The Chromium OS EC needs a delay between transactions so it can get itself ready. Also it currently uses a non-standard way of specifying the interrupt. Add these so that the EC works reliably. The Rockchip Embedded DisplayPort driver is looking for a rockchip,panel property to find the panel it should work on. Add the property for the Gru-based boards. The U-Boot GPIO controlled regulator driver only considers the "enable-gpios" devicetree property, not the singular "enable-gpio" one. Some devicetree source files have the singular form as they were added to Linux kernel when it used that form, and imported to U-Boot as is. Fix one instance of this in the Gru boards' devicetree to the form that works in U-Boot. The PWM controlled regulator driver complains that there is no init voltage set for a regulator it drives, though it's not clear which one. Set them all to the voltage levels coreboot sets them: 900 mV. The RK3399 SoC needs to know the voltage level that some supplies provides, including one fixed 1.8V audio-related regulator. Although this synchronization is currently statically done in the board init functions, a not-so-hypothetical driver that does this dynamically would query the regulator only to get -ENODATA and be confused. Make sure U-Boot knows this supply is at 1.8V by setting its limits to that. Most of this is a reapplication of commit 08c85b57a5ec ("rockchip: gru: Add extra device-tree settings") whose changes were removed during a sync with Linux at commit 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux"). Apply things to rk3399-gru-u-boot.dtsi instead so they don't get lost again. Signed-off-by: Simon Glass <[email protected]> [Alper: move to -u-boot.dtsi, rewrite commit message, add more nodes] Co-developed-by: Alper Nebi Yasak <[email protected]> Signed-off-by: Alper Nebi Yasak <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Simon Glass <[email protected]> Tested-by: Simon Glass <[email protected]>
2022-03-16Merge tag 'xilinx-for-v2022.07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
2022-03-16arm64: zynqmp: Add pinctrl emmc description to SM-K26Michal Simek
Production SOM has emmc on it and make sense to describe pin description to be able use EMMC if it is not configured via psu_init. (Still some regs are not handled but this is one step in that direction) Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/3545a0f08d342de98efc82b78f5725eda091555a.1647267969.git.michal.simek@xilinx.com
2022-03-16Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- mvebu: dts: turris_mox: fix non-working network / MDIO (Marek)
2022-03-16Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- k210 updates
2022-03-16arm: mvebu: dts: turris_mox: fix non-working network / MDIOMarek Behún
Commit 0934dddc6436 ("arm: a37xx: Update DTS files to version from upstream Linux kernel") ported Linux's device-tree files for Armada 3720 SOCs. This broke network on Turris MOX, because the SOC's MDIO bus in U-Boot currently isn't probed via DM as it's own device, but is registered as part of mvneta's driver, which means that pinctrl definitions are not parsed for the MDIO bus node. Also mvneta driver does not consider "phy-handle" property, only "phy". For now, fix this by adding armada-3720-turris-mox-u-boot.dtsi file returning the MDIO to how it was defined previously. A better solution (using proper mvmdio DM driver) is being work on, but will need testing on various boards, and we need the bug fixed now for the upcoming release. Fixes: 0934dddc6436 ("arm: a37xx: Update DTS files to version from upstream Linux kernel") Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-03-15k210: dts: align plic node with LinuxNiklas Cassel
The Linux PLIC interrupt-controller driver actually initializes the hart context registers in the PLIC driver exactly in the same order as specified in the interrupts-extended device tree property. See the device tree binding [1]. The ordering of the interrupts is therefore essential in order to configure the PLIC correctly. Fix the order so that we will have sane IRQ behavior when booting Linux with the u-boot device tree. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml Signed-off-by: Niklas Cassel <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
2022-03-15k210: dts: align fpioa node with LinuxDamien Le Moal
Linux kernel fpioa pinctrl driver expects the sysctl phandle and the power bit offset of the fpioa device to be specified as a single property "canaan,k210-sysctl-power". Replace the "canaan,k210-sysctl" and "canaan,k210-power-offset" properties with "canaan,k210-sysctl-power" to satisfy the Linux kernel requirements. This new property is parsed using the existing function dev_read_phandle_with_args(). Signed-off-by: Damien Le Moal <[email protected]> Signed-off-by: Niklas Cassel <[email protected]> Reviewed-by: Sean Anderson <[email protected]>
2022-03-15k210: dts: add missing power bus clocksDamien Le Moal
Linux drivers for many of the K210 peripherals depend on the power bus clock to be specified. Add the missing clocks and their names to avoid problems when booting Linux using u-boot DT. Signed-off-by: Damien Le Moal <[email protected]> Signed-off-by: Niklas Cassel <[email protected]> Reviewed-by: Sean Anderson <[email protected]>
2022-03-15k210: use the board vendor name rather than the marketing nameDamien Le Moal
"kendryte" is the marketing name for the K210 RISC-V SoC produced by Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210" vendor,SoC compatibility string format in the device tree files and use the SoC name for file names. With these changes, the device tree files are more in sync with the Linux kernel DTS and drivers, making uboot device tree usable by the kernel. Signed-off-by: Damien Le Moal <[email protected]> Signed-off-by: Niklas Cassel <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
2022-03-15ARM: dts: stm32: Add DFU support for DHCOM recoveryMarek Vasut
This patch configures U-Boot SPL for DHCOM SoM to permit DFU upload of SPL and subsequent u-boot.itb for recovery or commissioning purposes. The DFU usage procedure is identical to STM32MP1 DHCOR SoM, see commit 3919aa1722a ("ARM: dts: stm32: Add DFU support for DHCOR recovery") , except for switching the SoM into DFU mode. By default, the DHCOM SoM has no dedicated mechanism for setting BOOTn straps into UART/USB mode, therefore to enter DFU mode, the SoC must fail to boot from boot media which can be selected by the BOOTn strap override mechanism first and then fall back to DFU mode. In case of a SoM with pre-populated BOOTn strap override button, power the system off, remove microSD card (if applicable), hold down the BOOTn strap override button located between eMMC and SoM edge connector, power on the SoM. The SoC will fail to boot from SD card and fall back into DFU mode. Signed-off-by: Marek Vasut <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-03-15stm32mp: psci: Implement PSCI system suspend and DRAM SSRMarek Vasut
Implement PSCI system suspend and placement of DRAM into SSR while the CPUs are in suspend. This saves non-trivial amount of power in suspend, on 2x W632GU6NB-15 ~710mW. Reviewed-by: Patrice Chotard <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: Patrice Chotard <[email protected]>
2022-03-15ARM: dts: stm32: Move vdd_io extras into Avenger96 extrasMarek Vasut
The vdd_io regulator is present only on DHCOR SoM configured for 1V8 IO, as populated on Avenger96, but not present on 3V3 DHCOR SoM. Move these extras to Avenger96 u-boot DT extras. Fixes: 3919aa1722a ("ARM: dts: stm32: Add DFU support for DHCOR recovery") Signed-off-by: Marek Vasut <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2022-03-15ARM: dts: stm32: Add USB OTG pinctrl and regulator nodes into SPL DT on DHCORMarek Vasut
Fix the following warning in SPL and make sure that even DTs which enforce Vbus detection using u-boot,force-vbus-detection;, the DFU in SPL will work. dwc2-udc-otg usb-otg@49000000: prop pinctrl-0 index 0 invalid phandle Signed-off-by: Marek Vasut <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-03-15arm: dts: stm32mp15: alignment with v5.17Patrick Delaunay
Device tree alignment with Linux kernel v5.17-rc1 - ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards - ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15 - ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx - ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1 - ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-03-15stm32mp1: bsec: add missing dev in function commentPatrick Delaunay
Add the missing @dev reference in some function description. Fixes: b66bfdf238b9 ("arm: stm32mp: bsec: migrate trace to log macro") Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-03-15stm32mp: bsec: add permanent lock write supportPatrick Delaunay
Add support of the permanent lock support in U-Boot proper when BSEC is not managed by secure monitor (TF-A SP_MIN or OP-TEE). This patch avoid issue with stm32key command and fuse command on basic boot for this missing feature of U-Boot BSEC driver. Reported-by: Johann Neuhauser <[email protected]> Signed-off-by: Patrick Delaunay <[email protected]> Tested-by: Johann Neuhauser <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-03-14Merge tag 'v2022.04-rc4' into nextTom Rini
Prepare v2022.04-rc4
2022-03-14Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- kwboot: Misc minor improvement and fixes, e.g. mix of arguments (Pali) - PCI: a37xx: Remap IO space to bus address 0x0 (Pali)
2022-03-14arm64: zynqmp: Fix i2c addresses for zynqmp-p-a2197Michal Simek
After double checking some i2c addresses are not correct. It is visible from i2c dump ZynqMP> i2c bus Bus 3: i2c@ff020000 74: i2c-mux@74, offset len 1, flags 0 Bus 5: i2c@ff020000->i2c-mux@74->i2c@0 Bus 6: i2c@ff020000->i2c-mux@74->i2c@2 Bus 7: i2c@ff020000->i2c-mux@74->i2c@1 Bus 8: i2c@ff020000->i2c-mux@74->i2c@3 Bus 4: i2c@ff030000 (active 4) 74: i2c-mux@74, offset len 1, flags 0 Bus 9: i2c@ff030000->i2c-mux@74->i2c@0 Bus 10: i2c@ff030000->i2c-mux@74->i2c@3 Bus 11: i2c@ff030000->i2c-mux@74->i2c@4 Bus 12: i2c@ff030000->i2c-mux@74->i2c@5 (active 12) 51: generic_51, offset len 1, flags 0 60: generic_60, offset len 1, flags 0 74: generic_74, offset len 1, flags 0 Bus 13: i2c@ff030000->i2c-mux@74->i2c@6 (active 13) 51: generic_51, offset len 1, flags 0 5d: generic_5d, offset len 1, flags 0 74: generic_74, offset len 1, flags 0 ZynqMP> i2c dev 4 Setting bus to 4 ZynqMP> i2c mw 74 0 18 ZynqMP> i2c probe Valid chip addresses: 18 36 37 50 51 60 74 ZynqMP> i2c mw 74 0 20 ZynqMP> i2c probe Valid chip addresses: 51 60 74 where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is also at address 0x60 based on log above. i2c address 0x74 is i2c mux and 0x51 is eeprom. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/0a198e9d993411e41473d130d5a5c20b6dc83458.1646639616.git.michal.simek@xilinx.com
2022-03-14arm: a37xx: Remap IO space to bus address 0x0Pali Rohár
Remap PCI I/O space to the bus address 0x0 in the Armada 37xx device-tree in order to support legacy I/O port based cards which have hardcoded I/O ports in low address space. Some legacy PCI I/O based cards do not support 32-bit I/O addressing. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-03-14x86: Add an enum name for the GNVS firmware typeSimon Glass
This enum is currently anonymous. Add a name so it can be used in the code. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2022-03-12Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini
- sunXi SPI fixups (Andre) - bcm iproc qspi (Rayagonda)
2022-03-10arm: add initial support for the Phytium Pomelo Boardweichangzheng
This adds platform code and the device tree for the Phytium Pomelo Board. The initial support comprises the UART and the PCIE. Signed-off-by: weichangzheng <[email protected]>
2022-03-10ARM: mach-omap2: omap3: Make clock functions staticAdam Ford
get_osc_clk_speed and get_sys_clkin_sel are only used in one file. Make them static. Tested on OMAP3530, DM3730, AM3517. Signed-off-by: Adam Ford <[email protected]>
2022-03-10ARM: dts: am3517-evm: Sync DTS with Linux 5.17-rc5Adam Ford
Sync the am3517-evm device tree files with those from Linux 5.17-rc5 with some additional fixes for pinmuxing Ethernet and moving the pinmux references to the respective peripherals. Signed-off-by: Adam Ford <[email protected]> Tested-by: Derald D. Woods <[email protected]>
2022-03-10ARM: dts: logicpd-torpedo: Resyc DTS files with Linux 5.17-rc5Adam Ford
Resyc DTS files with Linux 5.17-rc5. Signed-off-by: Adam Ford <[email protected]>
2022-03-10ARM: dts: logicpd-som-lv: Resync DTS files with Linux 5.17-rc5Adam Ford
Resync the DTS files for the Logic PD SOM-LV with Linux 5.17-rc5 with some additional pending changes to address issues with wrong pin-muxing on the OMAP35. Signed-off-by: Adam Ford <[email protected]>
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <[email protected]>
2022-03-10event: Convert misc_init_f() to use eventsSimon Glass
This hook can be implmented using events, for the three boards that actually use it. Add the event type and event handlers. Drop CONFIG_MISC_INIT_F since we can just use CONFIG_EVENT to control this. Since sandbox always enables CONFIG_EVENT, we can drop the defconfig lines there too. Signed-off-by: Simon Glass <[email protected]>
2022-03-10sandbox: start: Sort the header filesSimon Glass
These header files don't follow the correct order. Fix this. Signed-off-by: Simon Glass <[email protected]>
2022-03-10sunxi: Kconfig: Fix up SPI configurationAndre Przywara
Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64") selected CONFIG_SPI by default on all Allwinner A64 boards, even though only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs had to manually select DM_SPI and friends, even though they are a platform property (the sunxi SPI driver is DM_SPI only). Clean this up to allow easy selection of SPI flash support in U-Boot proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is selected, for *all* Allwinner SoCs. This simplifies the defconfig for two Libretech boards already. Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the four boards which allow SPI booting select this explicitly. Any board wishing to support SPI flash in U-Boot proper now just defines CONFIG_SPI and CONFIG_SPI_FLASH_<vendor> in its defconfig, Kconfig takes care of the rest. Signed-off-by: Andre Przywara <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2022-03-09arm64: zynqmp: add support for zcu106 rev1.0Neal Frager
This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has newer x16 DDR4 memories and it is SW compatible with revA. Signed-off-by: Neal Frager <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
2022-03-07ARM: dts: ast2500: Add ngpios property to GPIO nodeAndrew Jeffery
Populate gpio_count in the gpio subsystem for the AST2500. Signed-off-by: Andrew Jeffery <[email protected]>
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