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This synchronizes the device trees with those that are in the
process of being upstreamed into Linux. This is mostly the
current state of the device trees on the asahilinux branch
with a few extra bits used by OpenBSD. This includes device
trees for machines that were still missing.
There are still some differences that will hopefully be resolved
soon.
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Enable Second Ethernet port on which ROM support Ethboot.
Signed-off-by: Vignesh Raghavendra <[email protected]>
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This is required to enables spl_net boot on AM64x
Signed-off-by: Vignesh Raghavendra <[email protected]>
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In order to support Ethernet boot on AM64x, probe AM65 CPSW NUSS.
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Probe toplevel AM65 CPSW NUSS driver from misc_init_r() when driver
is enabled. Since driver is modeled as UCLASS_MISC, we need to
explicitly probe the driver. Use common misc_init_r() that entire
K3 family of SoCs.
Signed-off-by: Vignesh Raghavendra <[email protected]>
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In case of xSPI bootmode OSPI flash is in DDR mode and needs to be accessed
in multiple of 16bit accesses Hence we cannot parse sysfw.itb FIT image
directly on OSPI flash via MMIO window. So, copy the image to internal
on-chip RAM before parsing the image.
Moreover, board cfg data maybe modified by ROM/TIFS in case of HS platform
and thus cannot reside in OSPI/xSPI and needs to be copied over to
internal OCRAM.
This unblocks OSPI/xSPI boot on HS platforms
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Dave Gerlach <[email protected]>
Tested-by: Keerthy <[email protected]>
Acked-by: Pratyush Yadav <[email protected]>
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Currently only the PADCFG registers of the main domain are unlocked.
Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured by u-boot or Linux.
Signed-off-by: Michael Liebert <[email protected]>
Tested-by: Christian Gmeiner <[email protected]>
Acked-by: Nishanth Menon <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc1
Documentation:
* Fix building HTML documentation of readthedocs.io
* Add ARM Juno board documentation
* Build requirements for Alpine Linux
* Include DM headers in API documentation
UEFI:
* Fix section alignment of EFI binaries
* Fix header length of RISC-V EFI binaries allowing to run them on EDK II
* Remove kaslr-seed from device tree if the EFI_RNG_PROTOCOL is provided
Other:
* Let 'part list' show all 128 GPT partitions
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At present some 32-bit settings are used with the 64-bit app. Fix this by
separating out the two cases.
Be careful not to break the 64-bit payload, which needs to build a 64-bit
EFI stub with a 32-bit U-Boot.
Signed-off-by: Christian Melki <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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That script is not intended for use with EFI, so update the logic to avoid
using it.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Christian Melki <[email protected]>
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Make sure the linker lists are in the right place and drop the eh_frame
section, which is not needed.
Signed-off-by: Simon Glass <[email protected]>
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Add an empty CPU init function to avoid fiddling with low-level CPU
features in the app. Set up the C runtime correctly for 64-bit use
and avoid clearing BSS, since this is done by EFI when U-Boot is loaded.
Signed-off-by: Simon Glass <[email protected]>
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At present this function requires a pointer to struct efi_entry_memmap
but the only field used in there is the desc_size. We want to be able
to use it from the app, so update it to use desc_size directly.
Signed-off-by: Simon Glass <[email protected]>
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The alignment of sections in the EFI binaries generated by U-Boot is
incorrect.
According to the PE-COFF specification [1] the minimum value for
FileAlignment is 512. If the value of SectionAlignment is
less then the page size, it must equal FileAlignment.
Let's set both values to 512 for the ARM and RISC-V architectures.
[1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format
Signed-off-by: Heinrich Schuchardt <[email protected]>
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EDK II refuses to load the EFI binaries created by U-Boot.
The reason is an incorrect PE-COFF header. The number of
data directories does not match NumberOfRvaAndSizes.
This leads to a failed consistency check in
PeCoffLoaderGetPeHeader():
SizeOfOptionalHeader - HeaderWithoutDataDir) !=
NumberOfRvaAndSizes * sizeof(DATA_DIRECTORY))
Fixes: 9afaeec6ef8b ("riscv: Complete efi header for RV32/64")
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Apple's ARMv8 cores don't implement EL3 and therefore don't
provide a PSCI implementation. So don't attempt to use
PSCI to reset on machines using Apple SoCs.
Signed-off-by: Mark Kettenis <[email protected]>
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BootROMs on pre-A38x SoCs enabled its output on UART by default, but A38x'
BootROM has its output on UART disabled by default.
To enable BootROM output on A38x SoC, it is required to set DEBUG flag
(which only enables BootROM output and nothing more) in kwbimage. For UART
images this DEBUG flag is ignored by BootROM.
Enable kwbimage DEBUG flag for all A38x boards.
With this change BootROM prints the following (success) information on UART
before booting U-Boot kwbimage:
BootROM - 1.73
Booting from SPI flash
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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U-Boot SPL for mvebu platform is not compiled as position independent.
Therefore it is required to instruct BootROM to load U-Boot SPL at the
correct address. Loading of kwbimage binary code at specific address can be
now achieved by the new LOAD_ADDRESS token as part of BINARY command in
kwbimage config file.
Update mvebu Makefile to put value of $(CONFIG_SPL_TEXT_BASE) into
LOAD_ADDRESS token when generating kwbimage.cfg from kwbimage.cfg.in.
It is required to update regex for sed to find replacement tokens at any
position on a line in kwbimage config file and not only at the beginning of
the line. This is because LOAD_ADDRESS is specified at the end of line
containing the BINARY command.
It looks like all Armada boards set CONFIG_SPL_TEXT_BASE to value
0x40004030 or 0x40000030. Why this value? It is because main kwbimage
header is at address 0x40004030 or 0x40000000 and it is 32 bytes long.
After the main header there is the binary header, which consist of 1 byte
for type, 3 bytes for size, 1 byte for number of arguments, 3 reserved
bytes and then 4 bytes for each argument. After these arguments comes the
executable code.
So arguments start at address 0x40004028 or 0x40000028. Before commit
e6571f38c943 ("arm: mvebu: Remove dummy BIN header arguments for SPL
binary") there were two (dummy) arguments, which resulted in load address
of 0x40004030 or 0x40000030, always. After that commit (which removed dummy
arguments), load address stayed same due to the 128-bit alignment done by
mkimage.
This patch now reflects the dependency between $(CONFIG_SPL_TEXT_BASE),
load address and dummy kwbimage arguments, and allows the user to adjust
$(CONFIG_SPL_TEXT_BASE) config option to some other value.
For unsupported values, when mkimage/kwbimage cannot set chosen load address
as specified by $(CONFIG_SPL_TEXT_BASE), the build process now fails,
instead of silently generating non-working kwbimage.
Removal of this alignment between $(CONFIG_SPL_TEXT_BASE) and LOAD_ADDRESS
can only be done by compiling U-Boot SPL as position independent. But this
currently is not possible for 32-bit ARM version of U-Boot SPL.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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kwbimage needs to know CPU type, so set it in kwbimage config file.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Usage of $(call cmd,...) is standard way to call other commands which
generate things.
It also has the advantage of printing build information in the form
KWBCFG arch/arm/mach-mvebu/kwbimage.cfg
if verbosity is disabled, and printing the build command otherwise.
Note that the '#' character needs to be escaped in Makefile when used as
value for make variable assignment.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The DT properties for the "enable-arbiter" and "keep-config" config
knobs were previously named inconsistently:
- The u-boot driver used "nand-enable-arbiter" and "nand-keep-config"
names, without Marvell prefixes.
- The Linux driver uses "marvell,nand-keep-config" ("enable-arbiter"
does not exist anymore in recent kernels, but it also used to be
"marvell,nand-enable-arbiter").
- The device trees almost all use "marvell," prefixed names, except for
one single instance of "nand-enable-arbiter" without vendor prefix.
This commit standardizes on the vendor prefixed version, making the
u-boot driver read from DT props "marvell,nand-enable-arbiter" and
"marvell,nand-keep-config". The one device tree using the unprefixed
version is also changed to use the new naming.
This has the side effect of making the previously no-op "marvell,"
config knobs already present in some DTs actually do something. This was
likely the original intention of the DT authors, but note that this
commit was not tested on every single impacted board.
Signed-off-by: Pierre Bourdon <[email protected]>
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As explained in commit 3bedbcc3aa18 ("arm: mvebu: a38x: serdes: Don't
overwrite read-only SAR PCIe registers") it is required to set Maximum Link
Width bits of PCIe Root Port Link Capabilities Register depending of number
of used serdes lanes. As this register is part of PCIe address space and
not serdes address space, move it into pci_mvebu.c driver.
Read number of PCIe lanes from DT property "num-lanes" which is used also
by other PCIe controller drivers in Linux kernel. If this property is
absent then it defaults to 1. This property needs to be set to 4 for every
mvebu board which use PEX_ROOT_COMPLEX_X4 or PEX_BUS_MODE_X4.
Enabling of PCIe port needs to be done afer all registers in PCIe address
space are properly configure. For this purpose use new mvebu-reset driver
(part of system-controller) and remove this code from serdes code.
Because some PCIe ports cannot be enabled individually, it is required to
first setup all PCIe ports and then enable them.
This change contains also all required "num-lanes" and "resets" DTS
properties, to make pci_mvebu.c driver work correctly.
Signed-off-by: Pali Rohár <[email protected]>
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ports
Enabling and disabling PCIe ports is done via address space of system
controller. All 32-bit Armada SoCs use low 4 bits in SoC Control 1 Register
for enabling and disabling some or more PCIe ports. Correct mapping needs
to be set in particular DTS files.
DT API for mvebu-reset is prepared for implementing resets also for other
HW blocks, but currently only PCIe is implemented via index 0.
Currently this driver is not used as PCIe ports are automatically enabled
by SerDes code executed by U-Boot SPL. But this will change in followup
patches.
Signed-off-by: Pali Rohár <[email protected]>
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Do not call pci_set_region() for resources which were not properly mapped.
This prevents U-Boot to access unmapped memory space.
Update MBUS_PCI_MEM_SIZE and MBUS_PCI_IO_SIZE macros to cover all PCIe MEM
and IO ranges. Previously these macros covered only address ranges for the
first PCIe port. Between MBUS_PCI_IO_BASE and MBUS_PCI_MEM_BASE there is
space for six 128 MB long address ranges. So set MBUS_PCI_MEM_SIZE to value
of 6*128 MB. Similarly set MBUS_PCI_IO_SIZE to 6*64 KB.
Function resource_size() returns zero when start address is 0 and end
address is -1. So set invalid resources to these values to indicate that
resource has no mapping.
Split global PCIe MEM and IO resources (defined by MBUS_PCI_*_* macros)
into PCIe ports in mvebu_pcie_bind() function which allocates per-port
based struct mvebu_pcie, instead of using global state variables
mvebu_pcie_membase and mvebu_pcie_iobase. This makes pci_mvebu.c driver
independent of global static variables (which store the state of
allocation) and allows to bind and unbind the driver more times.
Signed-off-by: Pali Rohár <[email protected]>
Signed-off-by: Marek Behún <[email protected]>
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The only user of board_pex_config() weak function is A385 controlcenterdc
board. It looks like that code in its board_pex_config() function needs to
be executed after PCIe link is up. Therefore put this code into
spl_board_init() function which is called after a38x serdes initialization,
and therefore it is after the serdes hws_pex_config() function finishes
(which is the state before this change).
With this change completely remove board_pex_config() function as it is not
used anymore.
Signed-off-by: Pali Rohár <[email protected]>
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Add a U_BOOT prefix to this tag since it is specific to the U-Boot
project.
Signed-off-by: Simon Glass <[email protected]>
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U-Boot define loff_t as long long. But the header
/usr/include/linux/types.h may not define it.
This has lead to a build error on Alpine Linux.
So let's use long long instead of loff_t for
the size parameter of function os_get_filesize().
Reported-by: Milan P. Stanić <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
Tested-by: Milan P. Stanić <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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- Add Apple M1 watchdog timer (Mark)
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"resetting".
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Rely on the new watchdog timer driver and the sysreset uclass to
reset the system. This gets rid of hard-coded addresses and
should work on systems based on the new M1 Pro and M1 Max SoCs
as well.
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <[email protected]>
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Add a node for the watchdog timer based on the proposed Linux
device tree bindings.
Remove the old reboot node which was a watchdog timert node in
disguise using a preliminary device tree binding.
Signed-off-by: Sven Peter <[email protected]>
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <[email protected]>
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a7y17lte is called SM-A720F, and a3y17lte SM-A320F. a3y17lte also
should select PINCTRL_EXYNOS78x0, not the (non-existent)
PINCTRL_EXYNOS7880, and it has an Exynos 7870 SoC and not 7880.
Fixes: 3e2095e960b4 ("board: samsung: add support for Galaxy A series
of 2017 (a5y17lte)")
Signed-off-by: Henrik Grimler <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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mcf5445x platform uses standard format of Config Address for PCI
Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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x86 platform uses standard format of Config Address for PCI Configuration
Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-amlogic into next
- disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
- add changes to support VIM3/L android boot by using meson64_android.h config
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All i.MX8MQ boards have been converted to binman, which makes it
necessary to flash both flash.bin and u-boot.itb to get a bootable
system. Prior to the conversion, only flash.bin was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).
Also update imx8mq_evk.rst to remove the u-boot.itb copy step.
This is a cherry-pick of 028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.
Signed-off-by: Patrick Wildt <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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CMD_DM is useful for showing the whole DM tree.
Enable it via "imply CMD_DM".
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
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GPIO7_IO00 is used as SD card detect.
Properly describe this in the devicetree.
Signed-off-by: Fabio Estevam <[email protected]>
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The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in imx8mm-kontron-n801x-s-u-boot.dtsi and causes
a build error. Remove the duplicate.
Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in phycore-imx8mm-u-boot.dtsi and causes a build
error. Remove the duplicate.
Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Use binman to pack images.
Note that imx8mm_venice supports several boards via multiple DTB's thus
in the fit node we must use:
- fit,fdt-list = "of-list"
- fdt-SEQ
- config-SEQ
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Explicitly add SPL aka u-boot-spl.bin filename.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Alphabetically re-order properties.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Use common imx8mm-u-boot.dtsi.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Alphabetically re-order nodes and properties.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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