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2021-05-24sandbox: use sections instead of symbols for getopt array boundariesMarek Behún
In style of linked lists, instead of declaring symbols for boundaries of getopt options array in the linker script, declare corresponding sections and retrieve the boundaries via static inline functions. Without this clang's LTO produces binary without any getopt options, because for some reason it thinks that array is empty (start and end symbols are at the same address). Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-24build: use thin archives instead of incremental linkingMarek Behún
Currently we use incremental linking (ld -r) to link several object files from one directory into one built-in.o object file containing the linked code from that directory (and its subdirectories). Linux has, some time ago, moved to thin archives instead. Thin archives are archives (.a) that do not really contain the object files, only references to them. Using thin archives instead of incremental linking - saves disk space - apparently works better with dead code elimination - makes things easier for LTO The third point is the important one for us. With incremental linking there are several options how to do LTO, and that would unnecessarily complicate things. We have to use the --whole-archive/--no-whole-archive linking option instead of --start-group/--end-group, otherwise linking may fail because of unresolved symbols, or the resulting binary will be unusable. We also need to use the P flag for ar, otherwise final linking may fail. Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Sync Armada mvpp2 ethernet driver with Marvell version (misc Marvell authors)
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2021-05-20arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"Stefan Roese
With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even when this is functionally incorrect since "2500base-x" was not supported in U-Boot at that time. As this mode is now supported (at least present in the headers), this patch moves back to the orinal version. Signed-off-by: Stefan Roese <[email protected]> Cc: Jakov Petrina <[email protected]> Cc: Vladimir Vid <[email protected]> Cc: Luka Perkov <[email protected]>
2021-05-19riscv: Drop USE_SPL_FIT_GENERATORBin Meng
Now that we have switched to binman to generate u-boot.itb for all RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can be dropped. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-19riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng
Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs, so that binman is now used to generate u-boot.itb. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2021-05-19riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng
By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along with a new dedicated device tree source file for the QEMU virt target used for binman only, we can now use binman to generate u-boot.itb. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-19riscv: dts: Sort build targets in alphabetical orderBin Meng
Sort the RISC-V DTS build targets by their Kconfig target names in alphabetical order. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-19riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng
At present SiFive Unleashed board uses the Makefile to create the FIT, using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile warning. Update to use binman instead. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-05-19arm64: zynqmp: Add description for SOM/Kria boardsMichal Simek
The patch contains several DT files for SOM platform. Carrier card is sck-kv (KV260) revA/B. SMK-K26 is description for starter kit which doesn't have EMMC populated. And SM-K26 is full som with EMMC. Files are divided in this way to make sure that SOM can be plugged to different carrier card and all peripherals on SOM (or defined by a spec) can be used by U-Boot. Full DT for SOM+CC can be merged together as overlays. Signed-off-by: Michal Simek <[email protected]>
2021-05-19arm64: zynqmp: Add psgtr DT descriptionsMichal Simek
Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek <[email protected]>
2021-05-19arm64: zynqmp: Add pinctrl descriptionMichal Simek
ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <[email protected]>
2021-05-19arm64: zynqmp: Add zynqmp firmware specific DT nodesT Karthik Reddy
Probe zynqmp firmware driver by adding zynqmp firmware, power & ipi mailbox device tree nodes for mini emmc. Signed-off-by: T Karthik Reddy <[email protected]>
2021-05-19arm64: zynqmp: Add missing mio-bank properties to sdhciMichal Simek
Add missing xlnx,mio-bank property to sdhci node. Also add properties with 0 value to have it listed in case that files are copied to different projects where default case doesn't need to be handled in the same way. That's why explicitly list them too. Signed-off-by: Michal Simek <[email protected]>
2021-05-19arm64: zynqmp: Remove comment about clock chipsMichal Simek
These comments weren't push to mainline that's why remove them. Signed-off-by: Michal Simek <[email protected]>
2021-05-19arm64: zynqmp: Add 'i2c-mux-idle-disconnect' propertyRaviteja Narayanam
I2C muxes that have the slave devices with same address are falling into the below problem. VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50 I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50 1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then 2. SC accesses I2C1 - Mux2 (0x75) - Channel 0. Now it results in 2 slave devices with same address (0x50) on the I2C bus, making the communication un-reliable. When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux channel output is disconnected, making none of the channels available to the I2C1. So, there is no question of having the same addressed slave (0x50) present on the bus when we are doing '2'. Same pattern is seen in below two boards also. ZCU208 - zynqmp-zcu208-revA.dts ZCU216 - zynqmp-zcu216-revA.dts Signed-off-by: Raviteja Narayanam <[email protected]>
2021-05-19arm64: zynqmp: Add label to all GPIO lines for VCK190 SCSaeed Nowshadi
Add label to GPIO lines so the user-level applications can find any line without knowing its physical path on System Controller on VCK190/VMK180. These labels are describing EMIO gpio connection which depends on PL which we normally don't describe but that's only way to go for now. Lately this should be done out of this source code. Signed-off-by: Saeed Nowshadi <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2021-05-19arm64: zynqmp: Add 'silabs,skip-recall' to DDR DIMM si570 clk nodeSaeed Nowshadi
The 'silabs,skip-recall' property prevents interruption in operation of the clock while the driver is being probed. Without this property, the DDR DIMM clk can cause a failure during Versal's boot. Signed-off-by: Saeed Nowshadi <[email protected]>
2021-05-19arm64: zynqmp: Add missing silabs,skip-recall for si570 ref clk nodesMichal Simek
All si570 which are used for ps reference clock generation should contain silabs,skip-recall property not to cause break on ps clock. On Versal boards this will cause hang on Versal cpu when it is booted at the same time with SC. Signed-off-by: Michal Simek <[email protected]>
2021-05-18Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2021-05-17riscv: Group assembly optimized implementation of memory routines into a submenuBin Meng
Currently all assembly optimized implementation of memory routines show up at the top level of the RISC-V architecture Kconfig menu. Let's group them together into a submenu. Signed-off-by: Bin Meng <[email protected]>
2021-05-17riscv: Fix memmove and optimise memcpy when misalignBin Meng
At present U-Boot SPL fails to boot on SiFive Unleashed board, due to a load address misaligned exception happens when loading the FIT image in spl_load_simple_fit(). The exception happens in memmove() which is called by fdt_splice_(). Commit 8f0dc4cfd106 introduces an assembly version of memmove but it does take misalignment into account (it checks if length is a multiple of machine word size but pointers need also be aligned). As a result it will generate misaligned load/store for the majority of cases and causes significant performance regression on hardware that traps misaligned load/store and emulate them using firmware. The current behaviour of memcpy is that it checks if both src and dest pointers are co-aligned (aka congruent modular SZ_REG). If aligned, it will copy data word-by-word after first aligning pointers to word boundary. If src and dst are not co-aligned, however, byte-wise copy will be performed. This patch was taken from the Linux kernel patch [1], which has not been applied at the time being. It fixes the memmove and optimises memcpy for misaligned cases. It will first align destination pointer to word-boundary regardless whether src and dest are co-aligned or not. If they indeed are, then wordwise copy is performed. If they are not co-aligned, then it will load two adjacent words from src and use shifts to assemble a full machine word. Some additional assembly level micro-optimisation is also performed to ensure more instructions can be compressed (e.g. prefer a0 to t6). With this patch, U-Boot boots again on SiFive Unleashed board. [1] https://patchwork.kernel.org/project/linux-riscv/patch/[email protected]/ Fixes: 8f0dc4cfd106 ("riscv: assembler versions of memcpy, memmove, memset") Signed-off-by: Bin Meng <[email protected]>
2021-05-17riscv: Fix arch_fixup_fdt always failing without /chosenSean Anderson
If /chosen was missing, chosen_offset would never get updated with the new /chosen node. This would cause fdt_setprop_u32 to fail. This patch fixes this by setting chosen_offset. In addition, log any errors from setting boot-hartid as well. Fixes: 5370478d1c7 ("riscv: Add boot hartid to device tree") Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Atish Patra <[email protected]>
2021-05-17riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to control the enabling of SiFive CLINT support in both SPL (M-mode) and U-Boot proper (S-mode). So for a typical SPL config that the SiFive CLINT driver is enabled in both SPL and U-Boot proper, that means the S-mode U-Boot tries to access the memory-mapped CLINT registers directly, instead of the normal 'rdtime' instruction. This was not a problem before, as the hardware does not forbid the access from S-mode. However this becomes an issue now with OpenSBI commit 8b569803475e ("lib: utils/sys: Add CLINT memregion in the root domain") that the SiFive CLINT register space is protected by PMP for M-mode access only. U-Boot proper does not boot any more with the latest OpenSBI, that access exceptions are fired forever from U-Boot when trying to read the timer value via the SiFive CLINT driver in U-Boot. To solve this, we need to split current SiFive CLINT support between SPL and U-Boot proper, using 2 separate Kconfig options. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Sean Anderson <[email protected]>
2021-05-16arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN913x DBKonstantin Porotchkin
This patch adds the dtsi/dts files needed to support the Marvell Octeon TX2 CN913x DB. This is only the base port with not all interfaces supported fully. Signed-off-by: Konstantin Porotchkin <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
2021-05-16arm64: mvebu: extend the mmio regionGrzegorz Jaszczyk
Some of the setups including cn9130 opens mmio window starting from 0xc0000000, reflect it in the u-boot code. Signed-off-by: Grzegorz Jaszczyk <[email protected]> Signed-off-by: Kostya Porotchkin <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
2021-05-16arm64: mvebu: a8k: move firmware related definitions to fw infoGrzegorz Jaszczyk
Signed-off-by: Grzegorz Jaszczyk <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
2021-05-16arm64: mvebu: do not map firmware RT service regionGrzegorz Jaszczyk
There is region left by ATF, which needs to remain in memory to provide RT services. To prevent overwriting it by u-boot, do not provide any mapping for this memory region, so any attempt to access it will trigger synchronous exception. Update sr 2021-04-12: Don't update armada3700/cpu.c mmu table, as this has specific changes included in mainline. Signed-off-by: Grzegorz Jaszczyk <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
2021-05-16arm64: mvebu: a8k: align memory regionsjinghua
1. RAM: base address 0x0 size 2Gbytes 2. MMIO: base address 0xf0000000 size 1Gbytes Signed-off-by: Ofir Fedida <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
2021-05-14Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini
2021-05-14Merge tag 'u-boot-amlogic-20210514' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-Pro - usb: dwc3-meson-g12a: skip phy on -ENODATA aswell - net: dwmac_meson8b: do not set TX delay in TXID & RXID - net: designware: meson8b: add g12a compatible
2021-05-14ARM: dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-ProNeil Armstrong
This lacks the right u-boot specific DT include to make HDMI work. Reported-by: B1oHazard <[email protected]> Signed-off-by: Neil Armstrong <[email protected]>
2021-05-14Revert "riscv: cpu: fu740: clear feature disable CSR"Bin Meng
This reverts commit bc8bbb77f74f21582b3bfd790334397757f88575. This commit breaks U-Boot booting on SiFive Unleashed board, as there is no such CSR on U54 core. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
2021-05-14riscv: Don't reserve AI ram in k210 dtsSean Anderson
It is no longer necessary to disallow ai ram, since it is enabled by the sram driver. Signed-off-by: Sean Anderson <[email protected]>
2021-05-14riscv: k210: Use AI as the parent clock of aisram, not PLL1Sean Anderson
Testing showed that disabling AI while leaving PLL1 enabled disabled the aisram. This suggests that AI is a more appropriate clock for that ram bank. Signed-off-by: Sean Anderson <[email protected]>
2021-05-14riscv: k210: Rename airam to aisramSean Anderson
This is more consistent with the naming of other ram banks, and matches what Linux is doing. Reported-by: Damien Le Moal <[email protected]> Signed-off-by: Sean Anderson <[email protected]>
2021-05-14riscv: Enable some devices pre-relocationSean Anderson
These devices are necessary for the clock driver, which is required by the sram driver, to run pre-relocation. Signed-off-by: Sean Anderson <[email protected]>
2021-05-13am335x: add support for cape detect functionalityKory Maincent
Update the Kconfig and the board file to make the am335x board compatible with cape detection. Signed-off-by: Kory Maincent <[email protected]>
2021-05-13arm: am335x: add support for i2c2 busKory Maincent
The am335x from BeagleBone use i2c EEPROM to detect capes. The memory is wired to i2c bus 2 therefore it need to be enabled. Add i2c2 clock, pinmux description and pinmux enable function. Signed-off-by: Kory Maincent <[email protected]>
2021-05-13arm: sunxi: add support for DIP detection to CHIP boardKory Maincent
Add the extension_board_scan specific function to scan the information of the EEPROM on one-wire and fill the extension struct. Add the Kconfig symbol to enable the needs to detect DIPs. Signed-off-by: Kory Maincent <[email protected]> Reviewed-by: Maxime Ripard <[email protected]> Acked-by: Andre Przywara <[email protected]>
2021-05-13am57xx: add support for cape detect functionalityKory Maincent
This commit enables using the extension board detection mechanism on AM57xx based platforms. Signed-off-by: Kory Maincent <[email protected]>
2021-05-13pytest: add sandbox test for "extension" commandKory Maincent
This commit extends the sandbox to implement a dummy extension_board_scan() function and enables the extension command in the sandbox configuration. It then adds a test that checks the proper functionality of the extension command by applying two Device Tree overlays to the sandbox Device Tree. Signed-off-by: Kory Maincent <[email protected]> [trini: Limit to running on sandbox] Signed-off-by: Tom Rini <[email protected]>
2021-05-12ARM: renesas: Scrub duplicate memory nodes from DT on Gen3Marek Vasut
Scrub duplicate /memory@* node entries here. Some R-Car DTs might contain multiple /memory@* nodes, however fdt_fixup_memory_banks() either generates single /memory node or updates the first /memory node. Any remaining memory nodes are thus potential duplicates. However, it is not possible to delete all the memory nodes right away, since some of those might not be DRAM memory nodes, but some sort of other memory. Thus, delete only the memory nodes which are in the R-Car3 DBSC ranges. Signed-off-by: Marek Vasut <[email protected]>
2021-05-12Merge tag 'ti-v2021.07-rc3' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ti - Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver
2021-05-12ARM: dts: k3-am642-sk: Add ethernet related DT nodesVignesh Raghavendra
Add CPSW related nodes for AM642 SK. There are two CPSW ports on the board but U-Boot supports only the first port. Signed-off-by: Vignesh Raghavendra <[email protected]>
2021-05-12ARM: dts: k3-am64-main: Add CPSW DT nodesVignesh Raghavendra
AM64 as CPSW3G IP with 2 external ports. Add DT entries for the same (based on kernel DT). Disable second port as its by default set to ICSS usage on EVM. Signed-off-by: Vignesh Raghavendra <[email protected]>
2021-05-12arm: dts: am642-r5-sk: Add r5 specific dtsLokesh Vutla
Add R5 specific dts for AM64 SK Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Sinthu Raja <[email protected]>
2021-05-12arm: dts: am642-sk: Add initial sk dtsLokesh Vutla
AM642 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM642 SoC. It supports the following interfaces: * 2 GB LPDDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode * x1 USB 3.0 Type-A port * x1 UHS-1 capable µSD card slot * 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837 * 512 Mbit OSPI flash * x2 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin Raspberry Pi compatible GPIO header * 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO) * 54-pin header for Programmable Realtime Unit (PRU) IO pins * Interface for remote automation. Includes: * power measurement and reset control * boot mode change Add basic support for AM642 SK. Signed-off-by: Lokesh Vutla <[email protected]>