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Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This will be used by the upcoming Serdes and driver code ported from
the original 2013 U-Boot code to mainline.
Signed-off-by: Stefan Roese <[email protected]>
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- Move LMB to Kconfig, improve functionality
- Add partlabel support to more fs cmds
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https://source.denx.de/u-boot/custodians/u-boot-mips
- net: fix traffic problems in MSCC Jaguar 2 network driver
- MIPS: mt7628: fix DDR memory init
- MIPS: octeon: add MMC and USB support
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gd is not used in this file that's why doesn't make sense to declare it.
Signed-off-by: Michal Simek <[email protected]>
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Migrate CONFIG_LMB in Kconfig.
Signed-off-by: Patrick Delaunay <[email protected]>
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Add the MMC DT node to the Octeon EBB7304 DT file including the
regulator node for the MMC power supply.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Aaron Williams <[email protected]>
Cc: Chandrakala Chavva <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Add the MMC DT node to the Octeon CN73xx dtsi file.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Aaron Williams <[email protected]>
Cc: Chandrakala Chavva <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Until now, the Octeontx MMC driver did only support the ARM Octeon
TX/Tx2 platforms. This patch adds support for the MIPS Octeon platform
to this driver. Here a short summary of the changes:
- Enable driver compilation for MIPS Octeon, including the MMC related
header file
- Reorder header inclusion
- Switch to using the clk framework to get the input clock
- Remove some functions for MIPS Octeon, as some registers don't
exist here
Signed-off-by: Stefan Roese <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Aaron Williams <[email protected]>
Cc: Chandrakala Chavva <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes the displayed DDR type of mt7628.
Signed-off-by: Weijie Gao <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed
with a wrong ddr_type in MT7688KN.
Signed-off-by: Weijie Gao <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Make sure to reset the switch core at probe time.
Signed-off-by: Horatiu Vultur <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Convert UDOO Neo to use DM MMC.
Signed-off-by: Peter Robinson <[email protected]>
Cc: Francesco Montefoschi <[email protected]>
Cc: Breno Lima <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
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Import the i.MX6SX based UDOO Neo dts files from Linux 5.12-rc1
and sync the i.MX6SX pinfunc.h
Signed-off-by: Peter Robinson <[email protected]>
Cc: Francesco Montefoschi <[email protected]>
Cc: Breno Lima <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Add support for stack protector for UBOOT, SPL, and TPL
as well as new pytest for stackprotector
Signed-off-by: Joel Peshkin <[email protected]>
Adjust UEFI build flags.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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The current usage of the variable CFLAGS_NON_EFI on the x86 architecture
deviates from other architectures.
Variable CFLAGS_NON_EFI is the list of compiler flags to be removed when
building UEFI applications. It is not a list of flags to be added anywhere.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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So far U-Boot was hard coding a (surely sufficient) memory size of 512
MB, even though all machines out there have at least 4GB of DRAM.
Since U-Boot uses its memory knowledge to populate the EFI memory map,
we are missing out here, at best losing everything beyond 4GB on Midway
boxes (which typically come with 8GB of DRAM).
Since the management processor populated the DT memory node already with
the detected DRAM size and configuration, we use that to populate
U-Boot's memory bank information, which is the base for the UEFI memory
map.
This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we
had in place to avoid U-Boot messing up the DT memory node before
loading the kernel.
Also, to cover the whole of memory, we need to enable PHYS_64BIT.
Signed-off-by: Andre Przywara <[email protected]>
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To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.
This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:
Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.
Signed-off-by: Andre Przywara <[email protected]>
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Enable IRQ using select for sandbox architecture.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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use 'select' to enable IRQ as it does not have architecture
specific dependency.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select
IRQ when GIC_V3_ITS is enabled.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Vladimir Oltean <[email protected]>
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The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables
must contain only zeros on initial allocation, and this must be visible
to the Redistributors, or else the effect is UNPREDICTABLE".
And as the following statement, we here clear the whole Pending tables
instead of the first 1KB.
"An LPI Pending table that contains only zeros, including in the first 1KB,
indicates that there are no pending LPIs.
The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However,
if the first 1KB of the LPI Pending table and the rest of the table contain
only zeros, this must indicate that there are no pending LPIs."
And there isn't any pending LPI under U-Boot, so it's unnecessary to
load the contents of the Pending table during the enablement, then set
the GICR_PENDBASER.PTZ flag.
Signed-off-by: Hou Zhiqiang <[email protected]>
Tested-by: Vladimir Oltean <[email protected]> # NXP LS1028A
Reviewed-by: Wasim Khan <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Enable PCIe by default in u-boot, this should eventually be made dynamic
in the runtime board config depending on the MCU configuration.
Signed-off-by: Neil Armstrong <[email protected]>
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The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some
ODROID-C2. The PHY seems to need proper reset timing to be functional
in U-Boot and Linux afterwards. Readd the old PHY reset bindings for
dwmac until we support the new bindings in the PHY node.
Fixes: dd5f2351e99a ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel features for 2021.07 cycle:
This small feature set include support for 5th PIO bank on pio4 pinctrl
driver and a fix for the SPL on sama5d3.
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This reverts commit 38d6b7ebdaee3e0e8426ef1b9df88bdce8ae2e75.
struct global_data contains a pointer to the bd_info structure. This
pointer was populated spl_set_bd() to a pre-allocated bd_info in the
".data" section. The referenced commit replaced this mechanism to one
that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y.
which very few boards do.
The result is that (struct global_data)->bd is NULL in SPL on most
platforms. This breaks falcon mode, since arch_fixup_fdt() tries to
access (struct global_data)->bd and set the "/memory" node in the
devicetree. The result is that the "/memory" node contains garbage
values, causing linux to panic() as it sets up the page table.
Instead of trying to fix the mess, potentially causing other issues,
revert to the code that worked, while this change is reworked.
Signed-off-by: Alexandru Gagniuc <[email protected]>
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in the early SPL boot stage whenever there is a call to udelay,
dm_timer_init fails to find the pit timer whenever it traverses
the device tree, if this property is not present
Signed-off-by: Manuel Reis <[email protected]>
CC: Eugen Hristev <[email protected]>
Tested-by: Derald D. Woods <[email protected]>
Reviewed-by: Eugen Hristev <[email protected]>
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Change the pinctrl compatible to sama7g5, the right one for this product.
Signed-off-by: Eugen Hristev <[email protected]>
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This is a patchset which makes away with the .bind() controller indexing
workaround which was broken since before v2021.04, and then adds PHY
support and MX8M support on top of that. Better add it into the release
early to get as much testing as possible done, because this really does
a lot of changes to the ehci-mx6 driver.
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https://source.denx.de/u-boot/custodians/u-boot-ti
- Support for pinmux status command on beaglebone
- Updates for MMC speed modes for J721e-evm
- Fix MMC booting on omap35_logic_somlv board
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Add power domain nodes to DT.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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Add power domain nodes to DT.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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The standard compatible string is "usb-nop-xceiv", use it.
Note that keystone-k2g.dtsi already uses the aforementioned
compat string, so this patch can only remove the override.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexey Brodkin <[email protected]>
Cc: Eugeniy Paltsev <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Jean-Jacques Hiblot <[email protected]>
Cc: Murali Karicheri <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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The standard compatible string is "usb-nop-xceiv", use it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexey Brodkin <[email protected]>
Cc: Eugeniy Paltsev <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Jean-Jacques Hiblot <[email protected]>
Cc: Murali Karicheri <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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delay values for MMCSD subsystems
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
Also, update the itap delay values for all the MMCSD subsystems according
the latest J721e data sheet[2]
[1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
[2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf
Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Aswath Govindraju <[email protected]>
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This adds support for devices with R40 dual rank DRAM, and asymmetric
A64 DRAM devices like the Pinephone/3GB.
Also we enable automatic gzipped kernel support, and allow scripted
DT overlay support. The rest of the patches are cleanups, but also
some sunxi-specific preparatory patches for USB3.0 and improved HDMI
support. The bulk of those changes will go through other trees, though.
Build-tested for all 156 sunxi boards, and boot tested on a A64, A20, R40,
H5, H6 and H616 board. USB, SD card, eMMC, HDMI and Ethernet all work
there (where applicable), with the exception of Ethernet on the H5. Since
this is already broken in v2021.04, I will send a separate fix.
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Currently sunxi Makefile manually specifies full path to dw-hdmi common
code. However, that is not needed because it can be selected in Kconfig
instead.
Select proper symbol in Kconfig and drop path from Makefile.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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The FIT description has access to the configuration variables. Use the
appropriate variable instead of hardcoding the address.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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binman can fill in the default FIT configuration index as selected by
the "default-dt" argument, which is set to CONFIG_DEFAULT_DEVICE_TREE.
Let's respect the user's configuration by taking advantage of this
feature, instead of always defaulting to the first device tree in
CONFIG_OF_LIST.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Previously we do not have proper dual rank memory detection on R40
(because we omitted PIR_QSGATE, which does not work on R40 with our
configuration), and dual rank memory is just simply disabled as early
R40 boards available (Banana Pi M2 Ultra and Berry) have single rank
memory.
As a board with dual rank memory (Forlinx OKA40i-C) is now known to us,
we need to have a way to do memory rank detection to support that board.
Add some routine to detect memory rank by trying to access the memory
in rank 1 and check for error status of the memory controller, and then
enable dual rank memory on R40.
Similar routine can be used to detect half DQ width (which is also
detected by PIR_QSGATE on other SoCs), but it's left unimplemented
because there's no known R40 board with half DQ width now.
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
[Andre: Move R40 detect code call into sunxi_dram_init()]
Signed-off-by: Andre Przywara <[email protected]>
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Previously we have known that R40 has a configuration register for its
rank 1, which allows different configuration than rank 0. Reverse
engineering of newest libdram of A64 from Allwinner shows that A64 has
this register too. It's bit 0 (which enables dual rank in rank 0
configuration register) means a dedicated rank size setup is used for
rank 1.
Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB
rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank
DRAM support necessary.
Add this support. The code could support both A64 and R40, but because
dual rank detection is broken on R40 now, we cannot really use it on R40
currently.
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Tested-by: Peter Robinson <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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- Add ECDSA support to FIT images
- Improve FIT image loadables (incl fpga) support
- Further FIT improvements with SPL
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update ls1028aqds networking protocol, config in ls1021atwr, env in ls1012a
Add seli3 board support, booke watchdog, update eTSEC support in ppc-qemu
Add DM_SERIAL and lpuart in sl28, add DM_ETH support for some of powerpc platforms
Signed-off-by: Priyanka Jain <[email protected]>
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