| Age | Commit message (Collapse) | Author |
|
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <[email protected]>
|
|
|
|
This patch adjusts memory map for secure boot headers on LS2080AQDS
and LS2080ARDB platforms. Secure boot headers are placed on NOR
flash at offset 0x00600000.
Signed-off-by: Udit Agarwal <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below
Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
PPA firmware 0x00400000
PHY firmware 0x00980000
DPAA2 MC 0x00A00000
DPAA2 DPL 0x00D00000
DPAA2 DPC 0x00E00000
Kernel.itb 0x01000000
Signed-off-by: Santan Kumar <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Santan Kumar <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Suresh Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS
flag is enabled. In case QIXIS code is not enabled, use default
sysclk value as 100MHz per board documentation.
Signed-off-by: Priyanka Jain <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <[email protected]>
CC: Mingkai Hu <[email protected]>
Acked-by: Mingkai Hu <[email protected]>
|
|
This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <[email protected]>
CC: Mingkai Hu <[email protected]>
Acked-by: Mingkai Hu <[email protected]>
|
|
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Santan Kumar <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate
CONFIG_IDE option so that IDE support can be enabled without requiring
the 'ide' command.
Update existing users and move the ide driver into drivers/block since
it should not be in common/.
Signed-off-by: Simon Glass <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_CMD_HASH
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_CMD_ESBC_VALIDATE
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it. Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool. In many cases we can select
these because they are required to implement other drivers. We also
correct how we include the various hashing algorithms in SPL.
This commit was generated as follows (after Kconfig additions):
[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL
Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.
Cc: Poonam Aggrwal <[email protected]>
Cc: Naveen Burmi <[email protected]>
Cc: Po Liu <[email protected]>
Cc: Shengzhou Liu <[email protected]>
Cc: Priyanka Jain <[email protected]>
Cc: Shaohui Xie <[email protected]>
Cc: Chunhe Lan <[email protected]>
Cc: Chander Kashyap <[email protected]>
Cc: Steve Rae <[email protected]>
Cc: Dirk Eibach <[email protected]>
Cc: Feng Li <[email protected]>
Cc: Alison Wang <[email protected]>
Cc: Sumit Garg <[email protected]>
Cc: Mingkai Hu <[email protected]>
Cc: York Sun <[email protected]>
Cc: Prabhakar Kushwaha <[email protected]>
Cc: Jaehoon Chung <[email protected]>
Cc: Akshay Saraswat <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Jagan Teki <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SPL_BOARD_INIT
Signed-off-by: Ley Foon Tan <[email protected]>
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini <[email protected]>
|
|
Switch to use DM USB.
Signed-off-by: Peng Fan <[email protected]>
|
|
Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
Now that mx6sabresd_spl_defconfig can be used to boot all
mx6sabresd variants, the non-SPL targets can be safely removed.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
Add support for the mx6dlsabresd board in SPL.
Retrieved the DCD table from:
board/freescale/mx6sabresd/mx6dlsabresd.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)
Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabresd boards.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Currently only MX6Q/QP sabresd boards are supported in SPL.
In order to also support MX6DL we need to convert to using
IOMUX_PADS and SETUP_IOMUX_PADS macros.
Other than that move the <asm/arch/mx6-ddr.h> header inclusion to the
SPL code block in order to avoid build error.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Drop use of this long-deprecated option for powerpc.
Signed-off-by: Simon Glass <[email protected]>
|
|
This option is pretty old. It predates CONFIG_SYS_I2C which is itself
deprecated in favour of driver model. Disable it for all boards.
Also drop I2C options which depend on this.
Signed-off-by: Simon Glass <[email protected]>
|
|
The function 'spin_wheel' is declared as inline, but not static and thus
we see warnings that 'w' and 'p' are declared static in a non-static
inline function. Correct this by marking spin_wheel as static inline.
Cc: TsiChung Liew <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
The variable usdhc1_pads is only referenced during SPL builds, add a guard.
Cc: Stefano Babic <[email protected]>
Cc: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
|
|
The variable usdhc1_pads is only referenced during SPL builds, add a
guard.
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
|
|
With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.
Cc: York Sun <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_CMD_BLOB
Signed-off-by: Simon Glass <[email protected]>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <[email protected]>
|
|
Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.
Signed-off-by: York Sun <[email protected]>
|
|
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Signed-off-by: Santan Kumar <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.
This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
As board-specific reset logic, it needs to issue reset signal
via CPLD when issuing 'reset' command in u-boot, this patch
solves the issue of reset command not working on T1024RDB.
Signed-off-by: Shengzhou Liu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Use CONFIG_ARCH_LS1021A instead.
Signed-off-by: York Sun <[email protected]>
|
|
- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size
as header is appended to u-boot image. So header will also be
copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for the
header.
- Reduce the size of CAAM driver for SPL Blobification functions
and descriptors, that are not required at the time of SPL are
disabled. Further error code conversion to strings is disabled
for SPL build.
Signed-off-by: Vinitha Pillai <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Add NAND secure boot target for ls1043ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
also defined.
Signed-off-by: Vinitha Pillai <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
- Add SD secure boot target for ls1043ardb.
- Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream
ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for secure
boto header.
- Error messages during SPL boot are limited to error code numbers
instead of strings to reduce the size of SPL image.
Signed-off-by: Vinitha Pillai-B57223 <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Add QSPI Secure Boot target to enable chain of trust
Signed-off-by: Sumit Garg <[email protected]>
Signed-off-by: Vinitha Pillai <[email protected]>
Reviewed-by: Ruchika Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Add QSPI Secure Boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Add NOR secure boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
Signed-off-by: Vinitha Pillai <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.
Signed-off-by: Vinitha Pillai <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
|
|
Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB
and convert it to Kconfig.
Signed-off-by: Sanchayan Maity <[email protected]>
Reviewed-by: Stefan Agner <[email protected]>
Reviewed-by: Alison Wang <[email protected]>
|
|
Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h
Signed-off-by: Tom Rini <[email protected]>
|
|
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.
Signed-off-by: Simon Glass <[email protected]>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <[email protected]>
|
|
This function name shadows a global name but is in fact different. This
is very confusing. Rename it to help with the following refactoring.
Signed-off-by: Simon Glass <[email protected]>
|
|
Explain how to flash the eMMC and how to boot from it.
Signed-off-by: Breno Lima <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|