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2020-07-06Revert "riscv: sifive: fu540: Add gpio-restart support"Tom Rini
As part of merging the next branch in to master, the sifive_fu540 will fail to link: riscv64-linux-ld.bfd: lib/built-in.o: in function `panic_finish': lib/panic.c:28: undefined reference to `do_reset' make[2]: *** [spl/u-boot-spl] Error 1 make[1]: *** [spl/u-boot-spl] Error 2 make: *** [sub-make] Error 2 And while the "fix the build" option of enabling CONFIG_SPL_SYSRESET may solve the issue, it is unclear that it is the correct path exactly. For the moment, I am reverting this commit and take a "revert the revert" and proper fix as soon as it's available. This reverts commit cdae446461191714d692190da1ad4344398adc57. Cc: Paul Walmsley <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Anup Patel <[email protected]> Cc: Atish Patra <[email protected]> Cc: Bin Meng <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel
Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-07-03riscv: sifive: fu540: Add gpio-restart supportBin Meng
The HiFive Unleashed board wires GPIO pin#10 to the input of the system reset signal. This adds gpio reboot support. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Sagar Kadam <[email protected]> Tested-by: Sagar Kadam <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-06-04sifive: fu540: Add sample SD gpt partition layoutJagan Teki
This is a sample GPT partition layout for SD card, right now three important partitions are added to make the system bootable. partition layout: Part Start LBA End LBA Name Attributes Type GUID Partition GUID 1 0x00000022 0x00000821 "loader1" attrs: 0x0000000000000000 type: 5b193300-fc78-40cd-8002-e86c45580b47 guid: cbcbef44-e627-42bc-b134-93b6f3784b8c 2 0x00000822 0x00002821 "loader2" attrs: 0x0000000000000000 type: 2e54b353-1271-4842-806f-e436d6af6985 guid: f54eba28-d8de-4852-978d-1a673777e2ae 3 0x00002822 0x00020821 "rootfs" attrs: 0x0000000000000004 type: 0fc63daf-8483-4772-8e79-3d69d8477de4 type: linux guid: 9561df46-8d55-4799-a83b-cfee9ef6ff93 Note: - loader1 would be fsbl or spl - loader2 would be U-Boot or U-Boot proper Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-06-04riscv: sifive: fu540: add SPL configurationPragnesh Patel
Add a support for SPL which will boot from L2 LIM (0x0800_0000) and then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin) from MMC boot devices. SPL related code is leveraged from FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]>
2020-06-04riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel
Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]>
2020-06-04sifive: fu540: add ddr driverPragnesh Patel
Add driver for fu540 to support ddr initialization in SPL. This driver is based on FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-06-04riscv: sifive: fu540: Use OTP DM driver for serial environment variablePragnesh Patel
Use the OTP DM driver to set the serial environment variable. Signed-off-by: Pragnesh Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]>
2020-06-02fu540: Remove ARCH= references from documentationTom Rini
When building U-Boot we select the architecture via Kconfig and not ARCH being passed in via the environment or make cmdline. While in here, add the doc file to the MAINTAINERS entry. Cc: Paul Walmsley <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Anup Patel <[email protected]> Cc: Atish Patra <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2020-05-26sifive: fix palmer's email addressPragnesh Patel
Fix Palmer's email address Signed-off-by: Pragnesh Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Palmer Dabbelt <[email protected]>
2020-05-18common: Drop linux/bug.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18command: Remove the cmd_tbl_t typedefSimon Glass
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-04-30sifive: fu540: Enable spi-nor flash supportJagan Teki
HiFive Unleashed A00 support is25wp256 spi-nor flash, So enable the same and add test result log for future reference. Tested on SiFive FU540 board. Thanks to Sagar for various use cases and tests. [QUAD mode in dt with spi-tx-bus-width: <4>] pp opcode = 0x34 [QUAD MODE] read opcode = 0x6c [QUAD MODE] erase opcode = 0x21 SPI-NOR: 1. erase entire flash: Pass 2. write entire flash: Pass 3. read entire flash: Pass 4. cmp 32MiB read back data: Pass 5. MMC: Booted Linux and dtb from mmc [SPI MODE in dt with spi-tx-bus-width: <1>] pp opcode = 0x12 [SPI MODE] read opcode = 0xc [SPI MODE] erase opcode = 0x21 SPI-NOR: 1. erase entire flash: Pass 2. write entire flash: Pass 3. read entire flash: Pass 4. cmp 32MiB read back data: Pass 5. MMC: Booted Linux and dtb from mmc Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Sagar Kadam <[email protected]>
2019-10-18configs: fu540: enable gpio driverSagar Shrikant Kadam
Enable the DM based GPIO driver for FU540-C000 SoC. Signed-off-by: Sagar Shrikant Kadam <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2019-09-03riscv: sifive: fu540: set serial environment variable from otpSagar Shrikant Kadam
This patch sets the serial# environment variable by reading the board serial number from the OTP memory region. Signed-off-by: Sagar Shrikant Kadam <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2019-07-19riscv: sifive: fu540: Enable SiFive SPI and MMC SPI driversBhargav Shah
This patch enables SiFive SPI and MMC SPI drivers for the SiFive Unleashed board. Signed-off-by: Bhargav Shah <[email protected]> Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2019-07-19riscv: sifive: fu540: Setup ethaddr env variable using OTPAnup Patel
This patch extends SiFive FU540 board support to setup ethaddr env variable based on board serialnum read from OTP. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-07-19clk: sifive: Drop GEMGXL clock driverAnup Patel
The GEMGXL clock driver is now directly part of Cadence MACB ethernet driver in upstream Linux kernel. There is no separate GEMGXL clock driver in upstream Linux kernel hence we drop GEMGXL clock driver from U-Boot as well. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-06-01riscv: sifive: fu540: Enable GEMGXL MGMT driverBin Meng
Enable the new GEMGXL MGMT driver so that GEM 10/100 Mbps works now. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Lukas Auer <[email protected]> Tested-by: Lukas Auer <[email protected]>
2019-04-08riscv: fu540: enable SMPLukas Auer
Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-02-27riscv: Add SiFive FU540 board supportAnup Patel
This patch adds SiFive FU540 board support. For now, only SiFive serial, SiFive PRCI, and Cadance MACB drivers are only enabled. The SiFive FU540 defconfig by default builds U-Boot for S-Mode because U-Boot on SiFive FU540 will run in S-Mode as payload of BBL or OpenSBI. Signed-off-by: Atish Patra <[email protected]> Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Alexander Graf <[email protected]> Reviewed-by: Lukas Auer <[email protected]> Reviewed-by: Bin Meng <[email protected]>