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Move env_set() over to the new header file.
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Document the main U-Boot image offset when booting from SATA disk on the
Clearfog board.
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Chris Packham <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Converted to use fsl_esdhc_imx for i.MX platforms.
Signed-off-by: Yangbo Lu <[email protected]>
Tested-by: Steffen Dirkwinkel <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Reviewed-by: Martyn Welch <[email protected]>
Acked-by: Jason Liu <[email protected]>
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Document build and install of U-Boot image on Clearfog with eMMC.
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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These macros are not used anywhere in the boards code.
Cc: Chris Packham <[email protected]>
Cc: Dirk Eibach <[email protected]>
Cc: Mario Six <[email protected]>
Cc: Dennis Gilmore <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").
The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:
ddr3: add missing txsdll parameter
ddr3: fix tfaw timimg parameter
ddr3: fix trrd timimg parameter
merge ddr3 topology header file with mv_ddr_topology one
mv_ddr: a38x: fix zero memory size scrubbing issue
The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
-UA70X0
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Baruch Siach <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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- Clearfog GT-8K support added by Baruch / Raheeb
- const and sizes cleanup (also in MIPS) from Baruch
- Minor cleanup to db-88f6820 from Chris
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Move the gdsys Controlcenter DC specific build time kwbimage.cfg
generation code into the mach-mvebu/ directory to be shared by all 32bit
mvebu platforms.
Remove board specific kwbimage.cfg files, and use the generated one
instead. These files are all identical, with two exceptions. Clearfog
and Helios4 use the sdio boot device, whereas all others use spi. Update
the defconfigs for the exceptional boards to generate the same
kwbimage.cfg as before.
Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Previously we had just made broad assumptions with which of our
boards had an eMMC or not even though this is a manufacturing time
assembly option. This takes the guessing away and actually checks for
the existence of an eMMC and sets up the has_emmc environment variable.
Signed-off-by: Jon Nettleton <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
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The HB2 boards as well as rev 1.5 soms support eMMC
booting as well as SDHC. Add the infrastructure to support
booting these devices.
Signed-off-by: Jon Nettleton <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
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The soms with 4GB ddr have a rowaddr of 16 not 15, this allows
the detection mechanism to properly identify them as 4GB.
However these soms can be populated with whatever amount of
memory the customer requests therefor we need a ram stride test.
We can not use the get_ram_size() function because not all 4GB's
of DDR is addressable on a 32-bit architecture. Therefore instead
we use a memory stride of 128MB's and look for the address that
the memory wraps. This function is used for all som types to
catch most memory configurations.
This is a revised version of Rabeeh Khoury's original code.
Signed-off-by: Jon Nettleton <[email protected]>
Signed-off-by: Rabeeh Khoury <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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In order to properly detect the board the checks need to be done
in a specific order. Move these tests back into a single enum
function that will always return the proper the board it is checking.
This also adds the best test we have for detecting the rev 1.5 som,
and it simplifies the device-tree filename building.
Signed-off-by: Jon Nettleton <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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This switches the clearfog boards to use DM based gpio and i2c
drivers. The io expanders are configured via their device-tree
entries.
Signed-off-by: Jon Nettleton <[email protected]>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This restores support for configuring the timing mode based on the
ddr_topology. This was originally implemented in commit 90bcc3d38d2b
("driver/ddr: Add support for setting timing in hws_topology_map") but
was removed as part of the upstream sync.
Signed-off-by: Chris Packham <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT
INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.
Some now empty files are removed and the ternary license is replaced
with a SPDX GPL-2.0+ identifier.
Signed-off-by: Chris Packham <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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These changes bring mainline back into line with the configurations
that were originally set in our stable BSP.
Signed-off-by: Jon Nettleton <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
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Signed-off-by: Florian Klink <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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The order of members in struct hws_topology_map is cas_wl, cas_l. The
comments in the original db-88f6820-gp.c had this wrong and have been
copied to other Armada-385 based boards. Practically this hasn't made a
difference since all these boards set both cas_wl and cas_l to 0
(autodetect) but if there were ever a board that did need to set these
explicitly they would run into unexpected issued.
Update the comments to reflect the correct order of structure members.
Reported-by: Tobi Wulff <[email protected]>
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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The hummingboard2 is slightly different to the cubox i and to the
hummingboard. The GPIO pin info to probe came from solidruns
for of u-boot on github.
https://github.com/SolidRun/u-boot-imx6/blob/imx6/board/solidrun/mx6_cubox-i/mx6_cubox-i.c#L569-L589
I have tested on a hummingboard-edge witha imx6 solo and 512mb of
ram.
Signed-off-by: Dennis Gilmore <[email protected]>
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Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D,
MX6Q and MX6QP processors move it to the soc.c file.
Signed-off-by: Breno Lima <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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We are now using an env_ prefix for environment functions. Rename setenv()
for consistency. Also add function comments in common.h.
Suggested-by: Wolfgang Denk <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.
This change is also coherent with the structure in kernel.
Signed-off-by: Stefano Babic <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: Akshay Bhat <[email protected]>
CC: Ken Lin <[email protected]>
CC: Marek Vasut <[email protected]>
CC: Heiko Schocher <[email protected]>
CC: "Sébastien Szymanski" <[email protected]>
CC: Christian Gmeiner <[email protected]>
CC: Stefan Roese <[email protected]>
CC: Patrick Bruenn <[email protected]>
CC: Troy Kisky <[email protected]>
CC: Nikita Kiryanov <[email protected]>
CC: Otavio Salvador <[email protected]>
CC: "Eric Bénard" <[email protected]>
CC: Jagan Teki <[email protected]>
CC: Ye Li <[email protected]>
CC: Peng Fan <[email protected]>
CC: Adrian Alonso <[email protected]>
CC: Alison Wang <[email protected]>
CC: Tim Harvey <[email protected]>
CC: Martin Donnelly <[email protected]>
CC: Marcin Niestroj <[email protected]>
CC: Lukasz Majewski <[email protected]>
CC: Adam Ford <[email protected]>
CC: "Albert ARIBAUD (3ADEV)" <[email protected]>
CC: Boris Brezillon <[email protected]>
CC: Soeren Moch <[email protected]>
CC: Richard Hu <[email protected]>
CC: Wig Cheng <[email protected]>
CC: Vanessa Maegima <[email protected]>
CC: Max Krummenacher <[email protected]>
CC: Stefan Agner <[email protected]>
CC: Markus Niebel <[email protected]>
CC: Breno Lima <[email protected]>
CC: Francesco Montefoschi <[email protected]>
CC: Jaehoon Chung <[email protected]>
CC: Scott Wood <[email protected]>
CC: Joe Hershberger <[email protected]>
CC: Anatolij Gustschin <[email protected]>
CC: Simon Glass <[email protected]>
CC: "Andrew F. Davis" <[email protected]>
CC: "Łukasz Majewski" <[email protected]>
CC: Patrice Chotard <[email protected]>
CC: Nobuhiro Iwamatsu <[email protected]>
CC: Hans de Goede <[email protected]>
CC: Masahiro Yamada <[email protected]>
CC: Stephen Warren <[email protected]>
CC: Andre Przywara <[email protected]>
CC: "Álvaro Fernández Rojas" <[email protected]>
CC: York Sun <[email protected]>
CC: Xiaoliang Yang <[email protected]>
CC: Chen-Yu Tsai <[email protected]>
CC: George McCollister <[email protected]>
CC: Sven Ebenfeld <[email protected]>
CC: Filip Brozovic <[email protected]>
CC: Petr Kulhavy <[email protected]>
CC: Eric Nelson <[email protected]>
CC: Bai Ping <[email protected]>
CC: Anson Huang <[email protected]>
CC: Sanchayan Maity <[email protected]>
CC: Lokesh Vutla <[email protected]>
CC: Patrick Delaunay <[email protected]>
CC: Gary Bisson <[email protected]>
CC: Alexander Graf <[email protected]>
CC: [email protected]
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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The Cubox-i and Hummingboard series of devices have an option of
SATA on board, and depending on how the fuses are blown even the
option to boot SPL from SATA. So enable support for it so it can
be used to boot the OS from if people desire.
Cc: Fabio Estevam <[email protected]>
Signed-off-by: Peter Robinson <[email protected]>
Acked-by: Fabio Estevam <[email protected]>
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The clearfog uses Armada 388.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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The DDR3 training code for Marvell A38X currently computes 1t timing
when given board topology map of the Turris Omnia, but Omnia needs 2t.
This patch adds support for enforcing the 2t timing in struct
hws_topology_map, through a new enum hws_timing, which can assume
following values:
HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
from the number of CSs
HWS_TIM_1T - enforce 1t
HWS_TIM_2T - enforce 2t
This patch also sets all the board topology maps (db-88f6820-amc,
db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
HWS_TIM_DEFAULT.
Signed-off-by: Marek Behun <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
the uSOM's 1512 Gigabit Ethernet phy.
This GPIO is valid on ClearFog rev 2.1 and newer.
Taken from SolidRun's specialised u-boot, see
https://github.com/SolidRun/u-boot-armada38x/commit/f906e3df172e07ac82cdd87b278d7896949262ea
Signed-off-by: Patrick Wildt <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <[email protected]>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <[email protected]>
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Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.
Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:
$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800
So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.
Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Eric Nelson <[email protected]>
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It's not necessary to implement the is_mx6q function, there is a macro in
sys_proto.h already implemented.
Signed-off-by: Breno Lima <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Simon Glass <[email protected]>
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Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Minkyu Kang <[email protected]>
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Merging all the board specific Kconfig options into the main Kconfig file
for mach-mvebu makes things easier to maintain.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Luka Perkov <[email protected]>
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This patch adds basic support for the SolidRun ClearFog Armada 38x based
board to mainline U-Boot. Supported interfaces / devices are:
- DDR3
- UART
- MMC
- Ethernet port 0 (connected to dedicated PHY)
- I2C
The included DT source was taken from Russell King's ftp server:
http://www.home.arm.linux.org.uk/~rmk/clearfog/
With only minor modifications, like the addition of some aliases and the
"u-boot,dm-pre-reloc" property.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Rabeeh Khoury <[email protected]>
Cc: Luka Perkov <[email protected]>
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Update my email address to the NXP account.
Signed-off-by: Fabio Estevam <[email protected]>
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We currently support various versions of Solidrun mx6 boards, so
remove the obsolete comment.
Reported-by: Jon Nettleton <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:
Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.
As per the AR8035 datasheet:
"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."
So do as suggested and keep the reset low for 10ms.
Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.
Signed-off-by: Fabio Estevam <[email protected]>
Tested-by: Tom Rini <[email protected]>
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Remove duplicated SYS_SOC Kconfig entry from board Kconfig,
because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Christian Gmeiner <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Troy Kisky <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: "Eric Bénard" <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Tim Harvey <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Markus Niebel <[email protected]>
Cc: Otavio Salvador <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Acked-by: Christian Gmeiner <[email protected]>
Acked-by: Markus Niebel <[email protected]>
Acked-by: Troy Kisky <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
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To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.
Initialize ddr_type for different boards which enable SPL.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tim Harvey <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Fabio Estevam <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Nikolaos Pasaloukos <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Hummingboard dual-lite is picking the incorrect calibration structure.
Fix it so that it can boot.
While at it, also fix p1_mpdgctrl1 register to match Solid-run's
setting.
Reported-by: Andrei Gherzan <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Tested-by: Andrei Gherzan <[email protected]>
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The 'mx6-microsom' directory was only used for the previous mx6solo
hummingboard support, which has been removed in favour of the SPL
version.
Remove the remaining piece of the old mx6solo hummingboard support.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Cubox-i boards are also supported, so update the README file.
Signed-off-by: Fabio Estevam <[email protected]>
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Hummingboard dual, dual-lite and solo are now supported via SPL mechanism.
Remove the previous hummingboard support, which does not use SPL and supported
only the solo variant.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Configure PAD_ENET_RXD0/RXD1 pads as pull down because these pads are directly
connected to the Atheros 8035/8030 although they should be functional
only in the RMII mode - 8030.
Signed-off-by: Rabeeh Khoury <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Tested-By: Vagrant Cascadian <[email protected]>
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mx6cuboxi sometimes fails to recognize the Ethernet PHY:
Net: Phy 0 not found
The explanation for this behavior comes from from Rabeeh Khoury:
"The LED_ACT pin on the carrier-one boards had a pull down that
forces the phy address to 0x0; where on CuBox-i and the production
HummingBoard that pin is connected directly to LED that depending
on the pull down strength of the LED it might be sampled as '0' or '1' thus
the phy address might appear as either address 0x0 or 0x4."
"This is AR8035 implementation; in reset stage the LED pin is configured as
input, and pull up/down does matter. In this case it configures the PHY
address.
After reset is deasserted the same LED pin becomes output and then
according to the previous pull/up it should be active high/low"
One way to properly fix this behavior is to place external pull-up/down
resistors in the LED line, but from a software standpoint we can fix it
by telling phy_find_by_mask() to scan the PHY at addresses
0x0 and 0x4.
Reported-by: Vagrant Cascadian <[email protected]>
Signed-off-by: Rabeeh Khoury <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Tested-By: Vagrant Cascadian <[email protected]>
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Enable USB Host1 port.
Signed-off-by: Rabeeh Khoury <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Tested-By: Vagrant Cascadian <[email protected]>
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