| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-10-27 | arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1 | Chin Liang See | |
| Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Dinh Nguyen <[email protected]> | |||
| 2015-12-20 | arm: socfpga: Drop the board boilerplate | Marek Vasut | |
| Drop all the common board code, since it is not completely useless. Signed-off-by: Marek Vasut <[email protected]> Cc: Chin Liang See <[email protected]> Cc: Dinh Nguyen <[email protected]> | |||
| 2015-12-07 | arm: socfpga: Add SoCFPGA SR1500 board | Stefan Roese | |
| The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Cc: Pavel Machek <[email protected]> Cc: Dinh Nguyen <[email protected]> Acked-by: Pavel Machek <[email protected]> | |||
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index : u-boot.git | |
| Unnamed repository; edit this file 'description' to name the repository. |
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