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Add the configs required to use the SAM9X60's USB clock.
Signed-off-by: Sergiu Moga <[email protected]>
Reviewed-by: Claudiu Beznea <[email protected]>
[claudiu.beznea: added CONFIG_AT91_SAM9X60_USB to
sam9x60_curiosity_mmc1_defconfig]
Signed-off-by: Claudiu Beznea <[email protected]>
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With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.
Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.
Fixes: e23cae30801f ("x86: som-db5800-som-6867: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.
Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.
Fixes: 5d1c8342aeaa ("x86: dfi-bt700: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.
Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.
Fixes: 388f93f96354 ("x86: conga-qeval20-qa3-e3845: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.
Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.
Fixes: f38be3086837 ("x86: bayleybay: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.
Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.
Add documentation on how to make this change safely.
Fixes: 66e2c665f3b6 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request for efi-next-20230325
Documenation:
* add man-page for efi command
UEFI:
* Let EFI app call ExitBootServices() before legacy booting kernel
* Support zboot and bootm in the EFI app
* Let efi command show configuration tables
* Support booting a 64-bit kernel from 64-bit EFI app
* Allocate device-tree copy from high memory
* simplify efi_str_to_u16()
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These have been disabled due to the rudimentary support available. It is
a little better now, so enable these options.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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The U-Boot EFI app can run as a 64-bit program, so set the Kconfig
correctly in that case. Make sure it doesn't build SPL, since there is
no need to switch from 32 to 64 bit when running.
Signed-off-by: Simon Glass <[email protected]>
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It's useful to enable Debug UART for future DM Serial regression tests
for Kirkwood boards.
Also, see background discussion in this thread:
https://lists.denx.de/pipermail/u-boot/2023-March/512010.html
Signed-off-by: Tony Dinh <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Enable 512MB PXA3XX NAND flash when u-boot is running.
Signed-off-by: Tony Dinh <[email protected]>
Acked-by: Pali Rohár
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Setting sf default mode to 0x3 breaks sf update when we do SF read
through u-boot console.
This issue arises when we do a splash image through OSPI flash media,
to fix this set the default mode to 0x0.
Fixes: 04150400c967 ("configs: enable OSPI related configs in AM62x")
Signed-off-by: Nikhil M Jain <[email protected]>
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On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
This means we will need to move the stack & heap from OCSRAM to HSM RAM
and reduce the size of BSS and the SPL to allow it to fit properly.
To protect us from overflowing our ~256k of HSM SRAM, add limits and
check during the wakeup SPL build.
Signed-off-by: Kamlesh Gurudasani <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-amlogic
- odroid-go-ultra: setup PMIC regulators at board init
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into next
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The Eagle board based on R-Car V3M, which does not support any USB
interfaces. The same applies for the Condor board based on R-Car V3H.
Remove the defines.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.07-rc1
cmd:
- Print results in hex instead of dec in smc command
firmware:
- Cover missing ZYNQMP_FIRMWARE dependencies
fpga:
- fix loads for unencrypted use case
relocation
- Add support for BE systems
spi:
- Fix xilinx_spi init reset sequence
arasan nand:
- Remove hardcoded bbt option
- Set ofnode value
xilinx:
- Enable SMC command
- Fix some sparse issues
zynqmp:
- Remove cdns,zynq-gem compatible string
- Add optee node
- Some DT cleanups
zynq:
- Some DT cleanups
microblaze
- Remove MANUAL_RELOC option
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https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Enable DM_SERIAL for freescale ls2080a
Drop non DM_ETH code for freescale:
lx2160a/ls2080rdb/ls2080aqds/ls1088a
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Remove CONFIG_ namespace options from .h, moving them to
defconfig, while changing non-defconfig options to CFG_ namespace.
Signed-off-by: Angelo Durgehello <[email protected]>
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This is not a Kconfig option so changing to _CFG.
Signed-off-by: Angelo Durgehello <[email protected]>
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Prepare v2023.04-rc4
Signed-off-by: Tom Rini <[email protected]>
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This reverts commit c714045cc3c0c36bc836c909e74db3273a7dd390.
Signed-off-by: Tom Rini <[email protected]>
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This reverts commit e352e1061f4c9a8adb70b6ff819890c42e5b3ef7.
Signed-off-by: Tom Rini <[email protected]>
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Now that the DT nodes for the serial devices are in place for these
boards, enable DM_SERIAL in the associated configs.
Signed-off-by: Ioana Ciornei <[email protected]>
Reviewed-by: Vladimir Oltean <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The Odroid Go Ultra has 2 chained PMICs RK818 and RK818, and needs
an adjustment on the BUCK and LDO values.
Add the initial regulators values in -u-boot.dtsi & run the initial
regulator setup in a new odroid-go-ultra board.
Proper OTG and BOOST regulators are still missing to have USB-A
host properly working.
Link: https://lore.kernel.org/r/20230210-u-boot-odroid-go-ultra-pmics-setup-v1-1-1f16d62b76af@linaro.org
Signed-off-by: Neil Armstrong <[email protected]>
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Add these options to provide some performance measurement, see cache
status and slightly speed up the appallingly slow console.
Signed-off-by: Simon Glass <[email protected]>
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Enable support for sysinfo on R-Car D3 Draak board. The sysinfo is used
e.g. to access and decode board-specific information and then in turn
used by board-info to print those information.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Tam Nguyen <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Drop compatible from I2C node, this is in r8a77995.dtsi already.
Drop status = "okay" from EEPROM node.
Add dts: tag.
Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
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Add new sysinfo IDs for R-Car V3H Condor/Condor-I .
Enable support for sysinfo on R-Car V3H Condor/Condor-I. The sysinfo is
used e.g. to access and decode board-specific information and then in
turn used by board-info to print those information.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Tam Nguyen <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Drop compatible from I2C node, this is in r8a77980.dtsi already.
Drop status = "okay" from EEPROM node.
Add dts: tag.
Update the commit message, note the new sysinfo IDs.
Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
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SMC command is very useful for TF-A testing or issuing commands which are
not covered by any driver. Strongly recommend to disable this command on
any product unless it is required.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/23c77a2cbd083963ca17b84de4108dbb1f28597f.1676450712.git.michal.simek@amd.com
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https://source.denx.de/u-boot/custodians/u-boot-video into next
- video console refactoring and optimization
- support for fonts wider than 1 byte
- use named header for 8x16 font data
- support multiple fonts configuration
- move get_font_size() to truetype driver ops
- support font size configuration at runtime
- add 16x32 Terminus font from linux
- add 12x22 Sun font from linux
- add 12x22 console simple font test
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Add 12x22 font in order to write a test for it.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Commit fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to
Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by
implementing a fine-grained selection of every bit in Kconfig.
But commit c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to
Kconfig") reworked it so that you now just have to provide the raw
value of each register in Kconfig. However, all fine-grained
Kconfig items remained allthough they are not used anymore.
Remove them all.
Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig")
Signed-off-by: Christophe Leroy <[email protected]>
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K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <[email protected]>
Acked-by: Andrew Davis <[email protected]>
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K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <[email protected]>
Acked-by: Andrew Davis <[email protected]>
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Enable defconfigs relevant for storing env on SPI flash.
Signed-off-by: Ryan Chen <[email protected]>
Reviewed-by: Chia-Wei Wang <[email protected]>
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Since the SPI flash chip mx25l3205d on this board has 4K-sector
capability, enable it for the envs.
Signed-off-by: Tony Dinh <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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We should enable pmic in SPL since it is used.
Signed-off-by: Simon Glass <[email protected]>
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Some options should be enabled which are missing. Fix this.
Signed-off-by: Simon Glass <[email protected]>
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We don't need to provide an empty arch_misc_init function here, we can
just not enable the hook.
Cc: Stefan Bosch <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Minkyu Kang <[email protected]>
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In this platform, arch_misc_init doesn't perform any real function. The
call to get_soc_type_rev has no lasting side effects.
Cc: Chris Packham <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Chris Packham <[email protected]>
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We don't need an empty function, we can just not enable the hook we
don't use.
Cc: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Building sandbox_spl with CONFIG_DEBUG leads to errors due to missing
symbols:
/usr/bin/ld: common/spl/spl_fit.o: in function `spl_fit_upload_fpga':
common/spl/spl_fit.c:595: undefined reference to `fpga_load'
/usr/bin/ld: test/test-main.o: in function `dm_test_post_run':
test/test-main.c:124: undefined reference to `crc8'
/usr/bin/ld: test/test-main.o: in function `dm_test_pre_run':
test/test-main.c:95: undefined reference to `crc8'
collect2: error: ld returned 1 exit status
This is due to -Og not eliminating unused functions.
Add FPGA and CRC8 support to the defconfig. Sandbox tests for
SPL_FPGA and CRC8 should be created. So enabling these setting
is advised anyway.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-at91 fixes for the 2023.04 cycle:
This fixes set include one clock index fix for sama7g5 and two board
configuration alignments for pm9g45.
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This new clearfog_sata_defconfig file is copy of existing
clearfog_defconfig file and changed to instruct build system to
generate final kwbimage for SATA booting.
This change is more readable via git option --find-copies-harder.
Signed-off-by: Pali Rohár <[email protected]>
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This new db-88f6820-amc_nand_defconfig file is copy of existing
db-88f6820-amc_defconfig file and changed to instruct build system to
generate final kwbimage for NAND booting. It was done by adding options:
CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND=y
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION=0x00
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
Board has Micron MT29F8G08ABACAWP chip which is SLC NAND with 4kB page size
and block size of 64 pages.
This change was only compile-tested and is useful for CI testing that
mkimage can generate valid kwbimage of NAND type.
This change is more readable via git option --find-copies-harder.
Signed-off-by: Pali Rohár <[email protected]>
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RK3588 has two memory gaps when using 16 GiB DRAM size:
[0x3fc000000 , 0x3fc500000]
and
[0x3fff00000 , 0x3ffffffff]
If the kernel is agnostic to these gaps, accessing the area causes
a SError panic.
Hence, add reserved memory areas in kernel's DTB before booting.
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x HDMI output, 1x HDMI input
Ethernet port
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 54mm
Kernel commits:
a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board")
6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.
General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC
On module WiFi6/BT5 is available in the following Neu6 variants.
Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.
IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.
Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
Boot log for the record,
DDR Version V1.08 20220617
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x6
CH0 RX Vref:31.7%, TX Vref:21.8%,21.8%
CH1 RX Vref:30.7%, TX Vref:22.8%,23.8%
CH2 RX Vref:30.7%, TX Vref:22.8%,22.8%
CH3 RX Vref:30.7%, TX Vref:21.8%,21.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out
U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Trying to boot from MMC1
INFO: Preloader serial: 2
NOTICE: BL31: v2.3():v2.3-391-g856309329:derrick.huang
NOTICE: BL31: Built : 14:15:50, Jul 18 2022
INFO: ext 32k is not valid
INFO: GICv3 without legacy support detected.
INFO: ARM GICv3 driver initialized in EL3
INFO: system boots from cpu-hwid-0
INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO: BL31: Initialising Exception Handling Framework
INFO: BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR: Error initializing runtime service opteed_fast
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0xa00000
INFO: SPSR = 0x3c9
U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Model: Edgeble Neu6A IO Board
DRAM: 7.5 GiB (effective 3.7 GiB)
Core: 71 devices, 15 uclasses, devicetree: separate
MMC: mmc@fe2c0000: 0
Loading Environment from nowhere... OK
In: serial@feb50000
Out: serial@feb50000
Err: serial@feb50000
Model: Edgeble Neu6A IO Board
Net: No ethernet found.
Hit any key to stop autoboot: 0
=>
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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=> usb start
starting USB...
Bus usb@fd000000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@fd800000: USB EHCI 1.00
scanning bus usb@fd000000 for devices... cannot reset port 1!?
2 USB Device(s) found
scanning bus usb@fd800000 for devices... 4 USB Device(s) found
scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (5 Gb/s, 0mA)
| U-Boot XHCI Host Controller
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+-2 Mass Storage (5 Gb/s, 224mA)
SanDisk Dual Drive 04019c9b2e1a58f24ee318c3c123aa5
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
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+-2 Hub (480 Mb/s, 100mA)
| USB 2.0 Hub
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+-3 Mass Storage (480 Mb/s, 500mA)
| JetFlash Mass Storage Device 19M7I4ZQFTSC08SU
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+-4 Human Interface (12 Mb/s, 98mA)
Logitech USB Receiver
Co-developed-by: Suniel Mahesh <[email protected]>
Signed-off-by: Suniel Mahesh <[email protected]>
Signed-off-by: Manoj Sai <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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