| Age | Commit message (Collapse) | Author |
|---|
|
Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs. Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.
Signed-off-by: Paul Gortmaker <[email protected]>
Acked-by: Kim Phillips <[email protected]>
|
|
With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB. The hardware silently truncates
them so the code happens to work. This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.
Signed-off-by: Andrew Klossner <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
Signed-off-by: Kim Phillips <[email protected]>
|
|
Delete the crypto node if not on an E-processor. If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.
Signed-off-by: Kim Phillips <[email protected]>
|
|
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
|
|
Signed-off-by: Marcel Ziswiler <[email protected]>
|
|
caused by missing dcache status/enable/disable functions.
Signed-off-by: Hugo Villeneuve <[email protected]>
|
|
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.
Signed-off-by: Stefan Roese <[email protected]>
|
|
|
|
Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
CFG_CSn_RO is defined as 0, the chipselect will not
be assigned.
Signed-off-by: TsiChung Liew <[email protected]>
|
|
Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
clock module in cpu/<cf arch>/cpu_init.c
Signed-off-by: TsiChung Liew <[email protected]>
|
|
The compiling error was caused by missing a closed parentheses
in speed.c
Signed-off-by: TsiChung Liew <[email protected]>
|
|
Signed-off-by: Kurt Mahan <[email protected]>
|
|
Signed-off-by: Kurt Mahan <[email protected]>
|
|
This patch now moves common.h to the top of the inlcude list. This
is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
the phys_size_t/phys_addr_t are defined to the correct size in this
driver.
Signed-off-by: Stefan Roese <[email protected]>
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
Signed-off-by: Kim Phillips <[email protected]>
|
|
|
|
ADS5121 Rev 3 board is now the default config
config targets are now
ads5121_config
Rev 3 board with
PCI
M41T62 on board RTC
512MB DRAM
ads5121_rev2_config
Rev 2 board with
No PCI
256MB DRAM
Signed-off-by: Martha Marx <[email protected]>
Acked-by: Grant Likely <[email protected]>
Acked-by: John Rigby <[email protected]>
|
|
Consolidate ADS5121 IO Pin configuration to one file
board/ads5121/iopin.c.
Remove pin config from cpu/mpc512x/fec.c
Signed-off-by: Martha Marx <[email protected]>
Acked-by: Grant Likely <[email protected]>
Acked-by: John Rigby <[email protected]>
|
|
|
|
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.
Signed-off-by: Stefan Roese <[email protected]>
|
|
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
To support such configurations, we "only" map the first 2GB via the TLB's. We
need some free virtual address space for the remaining peripherals like, SoC
devices, FLASH etc.
Note that ECC is currently not supported on configurations with more than 2GB
SDRAM. This is because we only map the first 2GB on such systems, and therefore
the ECC parity byte of the remaining area can't be written.
Signed-off-by: Stefan Roese <[email protected]>
|
|
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
|
|
Signed-off-by: Marcel Ziswiler <[email protected]>
|
|
This is particularly problematic now that non-NAND-specific code is
including <nand.h>, and thus all debugging code is being compiled
regardless of whether it was requested, as reported by Scott McNutt
<[email protected]>.
Signed-off-by: Scott Wood <[email protected]>
|
|
This makes it easier to use the driver on other platforms.
Signed-off-by: Haavard Skinnemoen <[email protected]>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <[email protected]>
|
|
After we move the atmel_mci driver into drivers/mmc, we can't select
it with CONFIG_MMC anymore. Introduce a new symbol specifically for
this driver so that there's no ambiguity.
Signed-off-by: Haavard Skinnemoen <[email protected]>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <[email protected]>
|
|
Signed-off-by: Matvejchikov Ilya <[email protected]>
|
|
The compiler will help find mismatches between printf formats and
arguments if you let it. This patch adds the necessary attributes to
declarations in include/common.h, then begins to correct the resulting
compiler warnings. Some of these were bugs, e.g., "$d" instead of
"%d" and incorrect arguments. Others were just annoying, like
int-long mismatches on a system where both are 32 bits. It's worth
fixing the annoying errors to catch the real ones.
Signed-off-by: Andrew Klossner <[email protected]>
|
|
|
|
By Cleanup out-or-tree building for some boards (.depend)
(commit:c8a3b109f07f02342d097b30908965f7261d9f15)
because filse ware changed, some SH-boards have compile error.
I revised this problem.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
|
|
The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.
Signed-off-by: Jason Jin <[email protected]>
|
|
|
|
Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
Remove duplicate code in a if/else block in
cpu/arm926ejs/davinci/lxt972.c.
Fixed style issues.
Signed-off-by: Hugo Villeneuve <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
|
|
Remove duplicate definitions in include/lxt971a.h.
Remove duplicate registers and bits definitions in
include/lxt971a.h for standard MII registers, and
use values in include/miiphy.h instead.
Signed-off-by: Hugo Villeneuve <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
|
|
|
|
|
|
This change helps with better handling with others
Xilinx based platform.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Stefan Roese <[email protected]>
|
|
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code. Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.
Signed-off-by: Ben Warren <[email protected]>
|
|
Conflicts:
board/amirix/ap1000/serial.c
board/exbitgen/exbitgen.c
board/exbitgen/flash.c
board/ml2/serial.c
board/xilinx/ml300/serial.c
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
Add support for updating mac-address and local-mac-address in fdt for
all MPC8260 targets.
Signed-off-by: Esben Haabendal <[email protected]>
|
|
The Register URXD contains status information in bits [15..8].
With status bit 15 set, CTRL-C was reported as 0x8003 instead
of 0x03. Therefore CTRL-C was not detected.
To solve this, bits [15..8] were masked out now.
Signed-off-by: Juergen Kilb <[email protected]>
Acked-by: Felix Radensky <[email protected]>
|
|
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
this out.
Signed-off-by: Stefan Roese <[email protected]>
|
|
This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:
Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.
This errata is not officially available yet. I'll update the comment
to add the errata number later.
Signed-off-by: Stefan Roese <[email protected]>
|
