| Age | Commit message (Collapse) | Author |
|---|
|
This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c
The new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit mask
ADC uclass's functions:
* single-channel:
- adc_start_channel() - start channel conversion
- adc_channel_data() - get conversion data
- adc_channel_single_shot() - start/get conversion data
* multi-channel:
- adc_start_channels() - start selected channels conversion
- adc_channels_data() - get conversion data
- adc_channels_single_shot() - start/get conversion data for channels
selected by bit mask
* general:
- adc_stop() - stop the conversion
- adc_vdd_value() - positive reference Voltage value with polarity [uV]
- adc_vss_value() - negative reference Voltage value with polarity [uV]
- adc_data_mask() - conversion data bit mask
The device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply: phandle to Vdd regulator's node
- vss-supply: phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
- vdd-microvolts: positive reference Voltage [uV]
- vss-microvolts: negative reference Voltage [uV]
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
This driver allows I/O operations on the Samsung S2MPS11 PMIC,
which provides lots of LDO/BUCK outputs.
To enable it, update defconfig with:
- CONFIG_PMIC_S2MPS11
and additional, if were not defined:
- CONFIG_CMD_PMIC
- CONFIG_ERRNO_STR
The binding info: doc/device-tree-bindings/pmic/s2mps11.txt
Signed-off-by: Przemyslaw Marczak <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
The CPU name for Exynos was concatenated with cpu id,
but for new Exynos platforms, like Chromebook Peach Pi
based on Exynos5800, the name of SoC variant does not
include the real SoC cpu id (0x5422).
For such case, the CPU name should be defined in device tree.
This commit introduces new device-tree property for Exynos:
- "cpu-model" - with cpu name string
If defined, then the cpu id is not printed.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
|
|
Signed-off-by: Tom Rini <[email protected]>
|
|
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
For most PPC platforms, they will call the first get_clocks() in
init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is
then defined to call the second get_clocks(), which should be
redundant for PPC.
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
|
|
|
|
|
|
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: John Otken <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
Added device-tree-binding information for zynq qspi controller
driver.
Signed-off-by: Jagan Teki <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Siva Durga Prasad Paladugu <[email protected]>
Acked-by: Michal Simek <[email protected]>
Tested-by: Jagan Teki <[email protected]>
|
|
Export fdt_blob to the environment variable. So that we may
use it to boot Linux.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
The current name is inconsistent with other driver model data access
functions. Rename it and fix up all users.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Joe Hershberger <[email protected]>
|
|
Convert altera_tse to driver model and phylib.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Add README.nios2 about how to add nios2 boards to u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Marek Vasut <[email protected]>
|
|
Convert altera sysid to driver model with misc uclass.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Convert altera timer to driver model.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Chin Liang See <[email protected]>
|
|
Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Convert altera_pio to driver model.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Convert altera_spi to driver model
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Convert altera_uart to driver model.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Marek Vasut <[email protected]>
|
|
Convert altera_jtag_uart to driver model.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Many System on Chip(SoC) solutions are complex with multiple processors
on the same die dedicated to either general purpose of specialized
functions. Many examples do exist in today's SoCs from various vendors.
Typical examples are micro controllers such as an ARM M3/M0 doing a
offload of specific function such as event integration or power
management or controlling camera etc.
Traditionally, the responsibility of loading up such a processor with a
firmware and communication has been with a High Level Operating
System(HLOS) such as Linux. However, there exists classes of products
where Linux would need to expect services from such a processor or the
delay of Linux and operating system being able to load up such a
firmware is unacceptable.
To address these needs, we need some minimal capability to load such a
system and ensure it is started prior to an Operating System(Linux or
any other) is started up.
NOTE: This is NOT meant to be a solve-all solution, instead, it tries to
address certain class of SoCs and products that need such a solution.
A very simple model is introduced here as part of the initial support
that supports microcontrollers with internal memory (no MMU, no
execution from external memory, or specific image format needs). This
basic framework can then (hopefully) be extensible to other complex SoC
processor support as need be.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Introduce a new fsp command and make the existing hob command a
sub-command to fsp for future extension. Also move cmd_hob.c to
the dedicated fsp sub-directory in arch/x86/lib.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
System Management BIOS (SMBIOS) is a specification for how
motherboard and system vendors present management information
about their products in a standard format by extending the BIOS
interface on Intel architecture systems. As of today the latest
spec is 3.0 and can be downloaded from DMTF website. This commit
adds a simple and minimum required implementation.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Current document about how to boot VxWorks is limited.
Add several chapters in README.vxworks to document this.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
- Add deletions from August 30 2015.
- A few from Sept 12, one from Oct 2nd.
Signed-off-by: Tom Rini <[email protected]>
|
|
Add in the commit IDs / dates for boards removed on Sept 2nd.
Signed-off-by: Tom Rini <[email protected]>
|
|
Signed-off-by: Masahiro Yamada <[email protected]>
|
|
This reverts commit 8fe11b8901a31d11990488c82bc23612589d57be.
I'll add support to lwmon5 in the next patch and will remove
support for the broken lcd4_lwmon5 as well.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: Masahiro Yamada <[email protected]>
|
|
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: Masahiro Yamada <[email protected]>
|
|
Desktop Management Interface (DMI) is not supported by U-Boot now.
Add it to the TODO list.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Document porting considerations for Intel Quark based board,
including MRC parameters and PCIe initialization.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
This board has not been converted to generic board by the deadline.
Remove it.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stefano Babic <[email protected]>
|
|
This board has not been converted to generic board by the deadline.
Remove it.
Signed-off-by: Simon Glass <[email protected]>
|
|
This board has not been converted to generic board by the deadline.
Remove it.
Signed-off-by: Simon Glass <[email protected]>
|
|
It's easier to Cc him on ARC-releated patches.
Signed-off-by: Masahiro Yamada <[email protected]>
|
|
CONFIG_X86_OPTION_ROM_ADDR has been renamed to CONFIG_VGA_BIOS_ADDR.
Update the doc to refer to the new name.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
|
|
Documentation file for DFU extension. With this functionality it is now
possible to transfer FIT images with firmware updates via TFTP and use
DFU backend for storing them.
Signed-off-by: Lukasz Majewski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Stefan Brüns <[email protected]>
|
|
The default config includes base.menu, not linux.list
Signed-off-by: Stefan Brüns <[email protected]>
|
|
|
|
It is easier to paste these into the command line if they are a single
common. Use line continuation instead of separate lines.
Signed-off-by: Simon Glass <[email protected]>
|
|
MMC support works now, so it can be dropped from the todo
Signed-off-by: Sjoerd Simons <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
|
