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2021-02-26ddr: marvell: a38x: enum mv_ddr_twin_die: change orderheaterC
commit 56db5d1464b44df10a02b99e615ebd6f6a35c428 upstream. @pali suggested this change In commit 6285efb ("mv_ddr: add support for twin-die combined memory device") was added support for twin-die combined memory device and default value for explicitly uninitialized structure members is zero, s also twin_die_combined is initialized to zero. Which means COMBINED value. As prior this commit there was no support for twin-die combined memory device, default value for twin_die_combined should be NOT_COMBINED. This change change order of enum mv_ddr_twin_die to ensure that NOT_COMBINED has value zero. Signed-off-by: heaterC <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: import code change from upstreamMarek Behún
commit 2bdd12dd68b1f8e27a03a3443ae49a09a14c18e4 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes code in ddr3_training.c. Import this change to remain consistent with upstream. Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: fix memory cs size functionMoti Buskila
commit c8b301463d508c807a33f7b7eaea98bbda4aa35e upstream. The funtion returnd cs size in byte instead of MB, that cause calculation error since the caller was expected to get u32 and when he got above 4G it refers it as 0. The fix was to get the cs memory size from function as in MB and then multiply it by 1MB. Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: import header change from upstreamMarek Behún
commit d653b305d0b3da9727c49124683f1a6d95d5c9a5 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes header ddr_topology_def.h. Import this header change to remain consistent with upstream. Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bitMoti Buskila
commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream. WL phase correcion stage is failing while using bus_width of 16bit, not to be fix this stage is un-necessary when working with bus_width of 16 bit. Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: add support for twin-die combined memory deviceMoti Buskila
commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream. the twin-die combined memory device should be treatened as X8 device and not as X16 one Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> [ - the default value for twin_die_combined is set to NOT_COMBINED for all boards, as this was default behaviour prior this change ] Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: add 16Gbit memory devices supportMoti Buskila
commit 994509eb4fe6771d92cd06314c37895098ac48fa upstream. Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: allow board specific ODT configurationBaruch Siach
commit 2d3b9437cf38c06c4330e0de07f29476197f5e04 upstream. The ODT enable heuristic based on active chip-selects is not always correct. Some board might use two chip-selects, but have only one ODT line connected. Allow board specific mv_ddr_topology_map to directly set the ODT configuration register value. Signed-off-by: Baruch Siach <[email protected]> Reviewed-by: Moti Buskila <[email protected]> Reviewed-by: Nadav Haklai <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: import header change from upstreamMarek Behún
commit 3908e20c6c520339e9bddb566823ae5e065d5218 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes header ddr_topology_def.h. Import this header change to remain consistent with upstream. Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: fix memory size calculation using 32bit bus widthMoti Buskila
commit ab9240402a70cc02496683971779e75eff410ab4 upstream. - function mv_ddr_spd_die_capacity_user_get() has a bug, since it insert a user memory enum to it, instead of SPD memory enum (which are different) - fix: remove mv_ddr_spd_die_capacity_user_get() function. - memory size with 64 and 32 bit already calculated correctly at mv_ddr_mem_sz_per_cs_get() function Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Stefan Chulski <[email protected]> Reviewed-by: Alex Leibovich <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: fix 32bitMoti Buskila
commit 0b5adedd4ced9b8f528faad1957d4d69e95759ef upstream. Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Alex Leibovich <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: import header change from upstreamMarek Behún
commit 6c705ebc0d70f67ed7cae83ad1978c3305ef25be upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes header mv_ddr_topology.h. Import this header change to remain consistent with upstream. Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: add ddr 32bit ECC supportAlex Leibovich
commit 61a8910998d7b553e80f600ebe8147a8b98f0945 upstream. Required changes made for 32bit ddr support. An update is made to the topology map, according to bus_act_mask, set in the dram_port.c Signed-off-by: Alex Leibovich <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: add ddr32 supportAlex Leibovich
commit 32800667b375ebd1f82120da0f3479b1cf52d96d upstream. Required changes made for 32bit ddr support. An update is made to the topology map, according to bus_act_mask, set in the dram_port.c Signed-off-by: Alex Leibovich <[email protected]> Reviewed-by: Nadav Haklai <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: import header change from upstreamMarek Behún
commit a165037ec26f301be75e1fabc263643683e85255 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes header ddr_topology_def.h. Import this header change to remain consistent with upstream. Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-26ddr: marvell: a38x: fix write leveling suplementary algoMoti Buskila
commit ce62bef8fac559e27245259882e45f19cdc293ad upstream. - fix JIRA A7K8K-5056 - remove TEST_PATTERN write at the load patern stage earlier to WL SUP stage - the WL SUP stage already writes this pattern to the memory, if the pattern exist at the memory then the algorithm will fail, since it think that there are no phase to correct Signed-off-by: Moti Buskila <[email protected]> Reviewed-by: Kostya Porotchkin <[email protected]> Signed-off-by: Marek Behún <[email protected]> Tested-by: Chris Packham <[email protected]>
2021-02-24dm: ddr: socfpga: don't assign values that are not usedHeinrich Schuchardt
The values of left_edge[0] and right_edge[0] are overwritten before they are used. Remove the superfluous assignments. Fixes: 285b3cb939a8 ("dm: ddr: socfpga: fix gen5 ddr driver to not use bss") Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-02-21dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIOIgor Opaniuk
Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <[email protected]> Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]> Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2021-01-23imx: ddr: imx8m: Move selfref_en after DDR scrubYe Li
When doing DDR scrub, the DDR may enter into self refresh if the selfref_en is enabled before DDR scrub. This will cause scrub can't complete that SBRSTAT.scrub_done won't be set. Since the selfref_en can be programmed during the course of normal operation, move it after DDR scrub Signed-off-by: Ye Li <[email protected]> Acked-by: Peng Fan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-05Merge tag 'v2021.01-rc5' into nextTom Rini
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <[email protected]>
2021-01-05dm: Use access methods for dev/uclass private dataSimon Glass
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <[email protected]> Acked-by: Andy Shevchenko <[email protected]> Acked-by: Pratyush Yadav <[email protected]>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <[email protected]>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <[email protected]>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <[email protected]>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <[email protected]>
2020-12-10armv8: lx2162a: Add Soc changes to support LX2162AMeenakshi Aggarwal
LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by: Meenakshi Aggarwal <[email protected]> [Fixed whitespace errors] Signed-off-by: Priyanka Jain <[email protected]>
2020-10-22ARM: mvebu: a38x: Fix comment typoNaoki Hayama
%s/occured/occurred/ Signed-off-by: Naoki Hayama <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2020-10-22common: rename getc() to getchar()Heinrich Schuchardt
The sandbox is built with the SDL2 library with invokes the X11 library which in turn calls getc(). But getc() in glibc is defined as int getc(FILE *) This does not match our definition. int getc(void) The sandbox crashes when called with parameter -l. Rename our library symbol getc() to getchar(). Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2020-07-27imx8m: ddrphy_utils: Improve coding styleFabio Estevam
Currently checkpatch is not happy about this file: total: 14 errors, 2 warnings, 7 checks, 359 lines checked Improve the coding style so that it can now report: total: 0 errors, 0 warnings, 6 checks, 360 lines checked Reported-by: Tom Rini <[email protected]> Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Peng Fan <[email protected]>
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <[email protected]>
2020-07-14drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issueOliver Chen
Add logic to automatically update umctl2's setting based on phy training CDD value for rank to rank space issue Acked-by: Ye Li <[email protected]> Signed-off-by: Oliver Chen <[email protected]> Signed-off-by: Jacky Bai <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2020-07-14drivers: ddr: imx8mp: Add inline ECC feature supportSherry Sun
the DRAM Controller in i.MX8MP will support a feature called "Inline ECC". This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and DDR3L). When this feature is enabled by software, the DRAM Controller reserves 12.5% of DRAM capacity for ECC information, and presents only the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to the rest of the SoC. The DRAM memory can be divided into 8 regions so that if a use case only requires ECC protection on a subset of memory, then only that subset of memory need support inline ECC. If this occurs, then there is no performance penalty accessing the non-ECC-protected memory (no need to access ECC for this portion of the memory map). This is all configured with the DRAM Controller. Signed-off-by: Sherry Sun <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2020-07-14driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8mJacky Bai
The 'selfref_en' should be bit'0', so correct the setting to enable the auto self-refresh. Reviewed-by: Jian Li <[email protected]> Reviewed-by: Ye Li <[email protected]> Signed-off-by: Jacky Bai <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2020-07-14driver: ddr: imx: skip ddr_ss_gpr config on imx8mnJacky Bai
There is no DDR_SS_GPR0 exits on i.MX8MN, so skip setting this register on i.MX8MN. Signed-off-by: Jacky Bai <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2020-07-09mv_ddr: ddr3: Update {min,max}_read_sample calculationChris Packham
Measurements on actual hardware shown that the read ODT is early by 3 clocks. Adjust the calculation to avoid this. Signed-off-by: Chris Packham <[email protected]> [upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22] Signed-off-by: Chris Packham <[email protected]> Tested-by: Baruch Siach <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2020-07-09mv_ddr: ddr3: Use correct bitmask for read sample delayChris Packham
In the Armada 385 functional spec (MV-S109094-00 Rev. C) the read sample delay fields are 5 bits wide. Use the correct bitmask of 0x1f when extracting the value. Signed-off-by: Chris Packham <[email protected]> [upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22] Signed-off-by: Chris Packham <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2020-06-04ddr: Rework errata A008109, A008378, 009942 workaroundJaiprakash Singh
Move errata A008109, A008378, 009942 workaround implementation from compute_fsl_memctl_config_regs() to fsl_ddr_set_memctl_regs() and add register write after each workaround implementation. Signed-off-by: Jaiprakash Singh <[email protected]> Signed-off-by: Priyanka Jain <[email protected]>
2020-06-04ddr: fsl: Impl. Erratum A008109Joakim Tjernlund
Impl. erratum as descibed in errata doc. Enable A008109 for T1040 and T1024 Signed-off-by: Joakim Tjernlund <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop linux/bug.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18command: Remove the cmd_tbl_t typedefSimon Glass
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <[email protected]>
2020-04-14arm: mvebu: drivers/ddr: remove redundant assignmentHeinrich Schuchardt
The value of local variable ecc is immediately overwritten. So we can remove the first assignment. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2020-04-14ddr: marvell: a38x: Allow boards to specify CK_DELAY parameterChris Packham
For some layouts it is necessary to adjust the CK_DELAY parameter to successfully complete DDR training. Add the ability to specify the CK_DELAY in the mv_ddr_topology_map. Signed-off-by: Chris Packham <[email protected]>
2020-04-10Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"Biwen Li
This reverts commit 2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee. The commit breaks uboot boot (hang in ddr init) on many PowerPC boards like P3041DS, P4080DS Signed-off-by: Biwen Li <[email protected]> Signed-off-by: Priyanka Jain <[email protected]>