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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.
Signed-off-by: Tom Rini <[email protected]>
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Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.
Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Signed-off-by: Tien Fong Chee <[email protected]>
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There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Xilfpga library expects the size of bitstream in a pointer
but currenly we are passing the size as a value. This patch
fixes this issue.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Nava kishore Manne <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Latest xilfpga expects to set BIT5 of flags for nonsecure
bitsream and also expects length in bytes instead of words
This patch does the same.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Joe Hershberger <[email protected]>
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This patch adds support for ZynqMP platform to print FPGA PCAP status
for "fpga status" command.
Signed-off-by: Nitin Jain <[email protected]>
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Check !desc earlier to simplify code.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Simon Goldschmidt <[email protected]>
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This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.
Signed-off-by: Vipul Kumar <[email protected]>
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
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This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.
Signed-off-by: Vipul Kumar <[email protected]>
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
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wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This drops the limit that fpga is only loaded from FIT images for Xilinx.
This is done by moving the 'partial' check from 'common/image.c' to
'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
and supplies a weak default implementation in 'drivers/fpga/fpga.c'.
Signed-off-by: Simon Goldschmidt <[email protected]>
Tested-by: Michal Simek <[email protected]> (On zcu102)
Signed-off-by: Michal Simek <[email protected]>
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Existing FPGA program write is always assume RBF data >= 32 bytes, so
any rbf data less than 32 bytes writing to FPGA would be failed.
This patch enhances the FPGA program write to support rbf data with
size >= 4 bytes.
Signed-off-by: Tien Fong Chee <[email protected]>
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Dont use local temporary buffer for printing out the
info instead use directly from memroy. This fixes the
issue of stack corruprion due to local buffer overflow.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Add FPGA driver support for Arria 10.
Signed-off-by: Tien Fong Chee <[email protected]>
Reviewed-by: Ley Foon Tan <[email protected]>
Reviewed-by: Dinh Nguyen <[email protected]>
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This converts the following to Kconfig:
CONFIG_FPGA_SOCFPGA
Signed-off-by: Tien Fong Chee <[email protected]>
Reviewed-by: Ley Foon Tan <[email protected]>
Reviewed-by: Dinh Nguyen <[email protected]>
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Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are still keeping
in driver/fpga/ and no functional change. Subsequent patch would move
FPGA manager driver from arch/arm into driver/fpga/.
Signed-off-by: Tien Fong Chee <[email protected]>
Reviewed-by: Ley Foon Tan <[email protected]>
Reviewed-by: Dinh Nguyen <[email protected]>
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Reuse invoke_smc() routine which is already defined
instead of duplicating same at multiple places.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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The number of arguments for printf does not match the
format string.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Xilinx core files will take care about it.
There is no need to have these functions because they do nothing.
Signed-off-by: Michal Simek <[email protected]>
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Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.
The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc
Signed-off-by: Patrick Bruenn <[email protected]>
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Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <[email protected]>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <[email protected]>
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Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Add missing Kconfig to fpga subsystem to be able
to add new options.
Signed-off-by: Michal Simek <[email protected]>
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Fix a number of typos, including:
* "compatble" -> "compatible"
* "eanbeld" -> "enabled"
* "envrionment" -> "environment"
* "FTD" -> "FDT" (for "flattened device tree")
* "ommitted" -> "omitted"
* "overriden" -> "overridden"
* "partiton" -> "partition"
* "propogate" -> "propagate"
* "resourse" -> "resource"
* "rest in piece" -> "rest in peace"
* "suport" -> "support"
* "varible" -> "variable"
Signed-off-by: Robert P. J. Day <[email protected]>
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Trivial patch.
Signed-off-by: Michal Simek <[email protected]>
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This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.
This StratixV support will be used by the theadorable board.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Tom Rini <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Vagrant Cascadian <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling this bit, while applicable to
Gen10 devices, will break FPGA programming on Gen5 devices.
Signed-off-by: Dinh Nguyen <[email protected]>
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Check for substrings in deviceID validation check
so that it can support xa bitstreams also.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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We should be setting the FPGA Interface Group global bit that will correctly
disable all interfaces between the FPGA and HPS.
Signed-off-by: Dinh Nguyen <[email protected]>
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The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.
Signed-off-by: Simon Glass <[email protected]>
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In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
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Show fpga_op->info even if desc->iface_fns is not defined.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Ensure that operations are correctly setup.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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SPL needs to detect FPGA device which will be used
for loading bitstream.
Signed-off-by: Michal Simek <[email protected]>
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The sandbox/ext4/fat/generic fs commands do not gracefully deal with files
greater than 2GB. Negative values are returned in such cases.
To handle this, the fs functions have been modified to take an additional
parameter of type "* loff_t" which is then populated. The return value
of the fs functions are used only for error conditions.
Signed-off-by: Suriyan Ramasami <[email protected]>
Acked-by: Simon Glass <[email protected]>
[trini: Update board/gdsys/p1022/controlcenterd-id.c,
drivers/fpga/zynqpl.c for changes]
Signed-off-by: Tom Rini <[email protected]>
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Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.
Signed-off-by: Pavel Machek <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
V2: Move the not-CPU specific stuff into drivers/fpga/ and base
this on the cleaned up altera FPGA support.
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Add a table of FPGA family with matching functions associated with
it and make all the code just look up the family in that table and
call the associated function instead of the horrible switch voodoo
which was duplicated all over the place.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Make the function return either 0 or -EINVAL, that is, normal
expected error codes and success codes instead of true/false
nonsense.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Move the function to the top of the file to avoid forward declaration.
No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Further improve the indentation in the rest of the file, where
the indentation is initially a bit less brutal. There is no
functional change in this patch.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Boldly go, where no programmer has gone before and just clean up
the indentation mayhem. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
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Clean up the printf() statements and get rid of the PRINTF()
macro by replacing it with debug_cond().
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Most of the warnings seem to be related to using 'int' for size_t. Change
this and fix up the remaining warnings and problems. For bootm, the warning
was masked by others, and there is an actual bug in the code.
Signed-off-by: Simon Glass <[email protected]>
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Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize] <interface>
[<dev[:part]>] <filename>
Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Do not do partial bitstream detection based on bitstream
size and use bitstream_type argument which is passed
from the fpga core.
Signed-off-by: Michal Simek <[email protected]>
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Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.
Signed-off-by: Michal Simek <[email protected]>
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Use helper function zynq_validate_bitstream so that the
code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Use zynq_dma_xfer_init, zynq_align_dma_buffer,
zynq_dma_transfer helper function performing dma
transfers so that the code can be reused easily for
different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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