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This is not used in U-Boot.
Signed-off-by: Simon Glass <[email protected]>
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Move all of the status LED feature to drivers/led/Kconfig.
The LED status definitions were moved from the board configuration
files to the defconfig files.
TBD: Move all of the definitions in the include/status_led.h to the
relevant board's defconfig files.
Tested boards: CL-SOM-AM57x, CM-T335
Signed-off-by: Uri Mashiach <[email protected]>
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The Tegra CAR (Clock And Reset) module provides control of most clocks
and reset signals within the Tegra SoC. This change implements a driver
for this module. However, since the module implements multiple kinds of
services (clocks, resets, perhaps more), all this driver does is bind
various sub-devices, which in turn provide the real services. This driver
is essentially an "MFD" (Multi-Function Device) in Linux kernel speak.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Debug server feature has been dropped from roadmap.
Signed-off-by: York Sun <[email protected]>
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This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
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The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Simon Glass <[email protected]>
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This driver should not be used in SPL since we do not have I2C support
enabled in SPL on sandbox.
Signed-off-by: Simon Glass <[email protected]>
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Add a driver which uses of-platdata to obtain its platform data. This can
be used to test the feature in sandbox. It displays the contents of its
platform data.
Signed-off-by: Simon Glass <[email protected]>
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The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW
Signed-off-by: Miao Yan <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.
Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.
Signed-off-by: Miao Yan <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.
Move these options to Kconfig and tidy up board configuration:
CONFIG_FIT
CONFIG_OF_BOARD_SETUP
CONFIG_OF_SYSTEM_SETUP
CONFIG_FIT_SIGNATURE
CONFIG_FIT_BEST_MATCH
CONFIG_FIT_VERBOSE
CONFIG_OF_STDOUT_VIA_ALIAS
CONFIG_RSA
Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.
Note: Masahiro's moveconfig.py script is amazing.
Signed-off-by: Simon Glass <[email protected]>
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini <[email protected]>
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The SMSC SIO1007 superio chipset integrates two ns16550 compatible
serial ports for legacy applications, 16 GPIO pins and some other
functionalities like power management.
This adds a simple driver to enable serial port and handle GPIO.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This is not used in SPL so don't allow it to be built there, even if I2C
is enabled in SPL.
Signed-off-by: Simon Glass <[email protected]>
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Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.
Signed-off-by: Simon Glass <[email protected]>
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Convert altera sysid to driver model with misc uclass.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Implement a Miscellaneous uclass with generic read or
write operations. This class is used only for those
do not fit other more general classes.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Simon Glass <[email protected]>
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DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.
For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: Zhuoyu Zhang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add a test to confirm that we can access system controllers and find their
driver data.
Signed-off-by: Simon Glass <[email protected]>
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Add drivers for sandbox. One can only perform a warm reset (which does
nothing). The other can perform a cold reset or a power reset (the
latter will quit U-Boot). These can be used for testing the reset uclass.
Signed-off-by: Simon Glass <[email protected]>
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It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.
To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.
Signed-off-by: Simon Glass <[email protected]>
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This patch adds a driver for the PCA9551 LED controller.
Originated-by: Timo Herbrecher <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Cc: Fabio Estevam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:
MC DDR region start = Top of DDR - area reserved by Debug Server FW
Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Enable PCI options so that sandbox can be used for testing this bus with
driver model.
Signed-off-by: Simon Glass <[email protected]>
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The Security Monitor is the SOC’s central reporting point for
security-relevant events such as the success or failure of boot
software validation and the detection of potential security compromises.
The API's for transition of Security states have been added
which will be used in case of SECURE BOOT.
Signed-off-by: Ruchika Gupta <[email protected]>
Signed-off-by: Gaurav Rana <[email protected]>
Reviewed-by: York Sun <[email protected]>
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On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Reviewed-by: Masahiro Yamada <[email protected]>
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To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
It supports reading and writing from a small data store.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Reviewed-by: Masahiro Yamada <[email protected]>
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <[email protected]>
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Add yet another OCOTP driver for this i.MX family. This time, it's a driver for
the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
different from the i.MX6 one that I could not use the mxc_ocotp.c driver without
making it into a big pile of #ifdef . This driver implements the regular fuse
command interface, but due to the IP blocks' limitation, we support only READ
and PROG functions.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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Add a simple emulation of the Chrome OS EC for sandbox, so that it can
perform various EC tasks such as keyboard handling.
Reviewed-by: Vadim Bendebury <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Freescale IFC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the driver to driver/misc
and fix the header file includes.
Signed-off-by: York Sun <[email protected]>
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Signed-off-by: Masahiro Yamada <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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This patch adds LPC support for carrying out the cros_ec protocol.
Signed-off-by: Randall Spangler <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Hung-ying Tyan <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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This patch adds SPI support for carrying out the cros_ec protocol.
Signed-off-by: Hung-ying Tyan <[email protected]>
Signed-off-by: Randall Spangler <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Simon Glass <[email protected]>
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This patch adds I2C support for carrying out the cros_ec protocol.
Signed-off-by: Randall Spangler <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Hung-ying Tyan <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.
Signed-off-by: Bernie Thompson <[email protected]>
Signed-off-by: Bill Richardson <[email protected]>
Signed-off-by: Che-Liang Chiou <[email protected]>
Signed-off-by: Doug Anderson <[email protected]>
Signed-off-by: Gabe Black <[email protected]>
Signed-off-by: Hung-ying Tyan <[email protected]>
Signed-off-by: Louis Yung-Chieh Lo <[email protected]>
Signed-off-by: Randall Spangler <[email protected]>
Signed-off-by: Sean Paul <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Vincent Palatin <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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Add an mxc_ocotp driver for i.MX6.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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Add a fsl_iim driver common to i.MX and MPC.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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This patch builds upon the recently introduced CBMEM console
feature of coreboot.
CBMEM console uses a memry area allocated by coreboot to store
the console output. The memory area has a certain structure,
which allows to determine where the buffer is, the buffer size
and the location of the pointer in the buffer. This allows
different phases of the firmware (rom based coreboot, ram based
coreboot, u-boot after relocation with this change) to keep
adding text to the same buffer.
Note that this patch introduces a new console driver and adds the
driver to the list of drivers to be used for console output, i.e.
it engages only after u-boot relocates. Usiong CBMEM console for
capturing the pre-relocation console output will be done under a
separate change.
>From Linux, run the cbmem.py utility (which is a part of the coreboot
package) to see the output, e.g.:
vvvvvvvvvvvvvvvvv
SCSI: AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode
flags: 64bit ilck stag led pmp pio
...
Magic signature found
Kernel command line: "cros_secure quiet loglevel=1 console=tty2...
^^^^^^^^^^^^^^^^^
Note that the entire u-boot output fits into the buffer only if
the coreboot log level is reduced from the most verbose. Ether
the buffer size will have to be increased, or the coreboot
verbosity permanently reduced.
Signed-off-by: Vadim Bendebury <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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It's arch code and not a driver, so move it where it belongs. When it
originally went into drivers/misc there was no 8xxx CPU directory.
This will make new-SPL support a little easier since we can keep the CPU
stuff together and not need to pull stuff in from drivers/misc.
Signed-off-by: Scott Wood <[email protected]>
Cc: Andy Fleming <[email protected]>
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The PMIC framework has been moved to its more natural place
./drivers/power from ./drivers/misc directory.
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
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Add support for the Dialog DA9053 PMIC.
Signed-off-by: Fabio Estevam <[email protected]>
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This commit adds support for MAX8997 PMIC driver.
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
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Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Stefano Babic <[email protected]>
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This commit adds support for MAX8998 PMIC driver.
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Stefano Babic <[email protected]>
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