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priv data has not been allocated when doing bind, so it is
wrong to use dev_get_priv in bind call back.
Let's switch to use platdata in the driver to fix the issue.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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When boot_dev is true, fill boot device. However the original logic is when
boot_dev is false, fill boot device, this will trigger data abort.
Also fix sc_misc_get_control when using pointer val.
Signed-off-by: Peng Fan <[email protected]>
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imx for 2019.01
- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
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Rename mx8m,MX8M to imx8m,IMX8M
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Jon Nettleton <[email protected]>
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Add driver for the efuse block in the JZ47xx SOC.
Cc: Daniel Schwierzeck <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Ezequiel Garcia <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC
[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <[email protected]>
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IFC driver changes to implement the chipselect mappings at run time.
Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.
Signed-off-by: Pankit Garg <[email protected]>
Signed-off-by: Rajesh Bhagat <[email protected]>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <[email protected]>
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At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.
Update the code to limit the size to 16 bytes.
Signed-off-by: Simon Glass <[email protected]>
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Correct a warning that occurs on sandbox. Also fix the comment style in
cros_ec_set_lid_shutdown_mask().
Signed-off-by: Simon Glass <[email protected]>
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At present these functions return 0 on success. For some devices we want
to know how many bytes were transferred. It seems useful to adjust the API
to be more like the POSIX read() and write() functions.
Update these two methods, a test and all users.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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This adds new commands to the EC related to setting and clearing events
as well as controlling power-related settings.
Signed-off-by: Simon Glass <[email protected]>
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The LPC driver expects its buffer to be word-aligned. Add the required
flag to the uclass driver to ensure this.
Signed-off-by: Simon Glass <[email protected]>
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This value is required for flashing to work correctly. Add a check for
it.
Signed-off-by: Simon Glass <[email protected]>
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Add some more logging to provide more information on failures.
Signed-off-by: Simon Glass <[email protected]>
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There is no advantage to using a u8 for function parameters. It forces
the compiler to mask values and can increase code size. Also the command
enum has been extended to 16 bits. Update the functions to use uint
instead.
Signed-off-by: Simon Glass <[email protected]>
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Fix compiler warning
drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects
argument of type ‘int’, but argument 5 has type ‘size_t
{aka long unsigned int}’ [-Wformat=]
Signed-off-by: Keerthy <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Instead of two staged ofnode_to_offset followed by
device_get_global_by_of_offset approach, direcly use the
device_get_global_by_ofnode to fetch the device.
Signed-off-by: Keerthy <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add test cases to cover the two newly added PCI APIs:
dm_pci_find_next_capability() & dm_pci_find_next_ext_capability().
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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This patch adds a driver for the bus associated with a IHS FPGA.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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Makefile entries should be sorted.
Reviewed-by: Anatolij Gustschin <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
Signed-off-by: Anatolij Gustschin <[email protected]>
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Currently the comments of several APIs (eg: dm_init_and_scan()) say:
@pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
flag. If false bind all drivers.
The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt
documents the same that both device tree properties and driver flag
are supported.
However the implementation only checks these special device tree
properties without checking the driver flag at all. This updates
lists_bind_fdt() to consider both scenarios.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Squashed in http://patchwork.ozlabs.org/patch/996473/ :
Signed-off-by: Simon Glass <[email protected]>
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Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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Merged imx8 architecture, fix build for imx8 + warnings
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Add clk/misc/pad/pm/rm scfw api implementaion for different
drivers to invoke. The low level code is using misc_call
to invoke imx8_scu driver.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Anatolij Gustschin <[email protected]>
Cc: Stefano Babic <[email protected]>
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Add i.MX8 MISC driver to handle the communication between
A35 Core and SCU.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Anatolij Gustschin <[email protected]>
Cc: Stefano Babic <[email protected]>
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At present version 3 messages are only supported on SPI. Add support for
using LPC as well, as used on samus.
Signed-off-by: Simon Glass <[email protected]>
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Allow selection of which EC image to hash.
Signed-off-by: Simon Glass <[email protected]>
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This file has changed quite a bit in the last 5 years as the capabilities
of the ECs have grown. Sync it up with the copy in coreboot commit
b9141f2215.
The only change is the addition of EC_VBNV_BLOCK_SIZE_V2. This is needed
because U-Boot uses the new v2 vboot API and this is not currently fully
supported by Chromium OS firmware.
Signed-off-by: Simon Glass <[email protected]>
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At present we pass around a private pointer to specify the cros_ec device.
With driver model it makes more sense to pass the device. Update the code
to do this.
Signed-off-by: Simon Glass <[email protected]>
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At present ofnode_read_fmap_entry() reads a flash map entry in a format
which is not supported by binman. To allow use to use binman-format
descriptions, update this function.
Also add a simple test.
Signed-off-by: Simon Glass <[email protected]>
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Add support for the Arm Versatile Express config bus that is
being used for exposing various subsystems via a generic
configuration bus. This driver adds support for generating
transactions on this configuration bus and can be used by
other drivers to abstract the communication with the actual
function providers.
Signed-off-by: Liviu Dudau <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
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This is file system generic loader which can be used to load
the file image from the storage into target such as memory.
The consumer driver would then use this loader to program whatever,
ie. the FPGA device.
Signed-off-by: Tien Fong Chee <[email protected]>
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Enable support for ICID setup of qman portals and the required device
tree fixups.
Signed-off-by: Laurentiu Tudor <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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This converts the following to Kconfig:
CONFIG_TWL4030_LED
CONFIG_TWL4030_INPUT
This also removes dead references to:
CONFIG_TWL4030_KEYPAD
Signed-off-by: Adam Ford <[email protected]>
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Add driver for the IHS IO endpoint on IHS FPGAs.
Signed-off-by: Mario Six <[email protected]>
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Add a set of tests for the misc uclass.
Signed-off-by: Mario Six <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add generic enable/disable function to the misc uclass.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor <[email protected]>
Reviewed-by: York Sun <[email protected]>
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QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.
Reviewed-by: Bharat Bhushan <[email protected]>
Signed-off-by: Laurentiu Tudor <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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With the newly added testing of more than one device, we get:
=> ut dm pci_swapcase
Test: dm_test_pci_swapcase: pci.c
test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
Expected "tHIS IS A tESt", got "this is a test"
Test: dm_test_pci_swapcase: pci.c (flat tree)
test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
Expected "tHIS IS A tESt", got "this is a test"
Failures: 2
The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.
It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.
We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).
Signed-off-by: Patrice Chotard <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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Update this function to take an ofnode so that it can work with livetree.
Signed-off-by: Simon Glass <[email protected]>
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At present the code overruns the bar[] array. Fix this.
At the same time, drop the leading / from the "/spl" path so that we can
run U-Boot SPL with:
spl/u-boot-spl
rather than requiring:
/path/to/spl/u-boot-spl
Reported-by: Coverity (CID: 131199)
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Since commit 0e373c0ade8c ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.
This allows to remove a specific case in RCC mfd driver.
Signed-off-by: Patrice Chotard <[email protected]>
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