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Add support for SD/eMMC controller present on some Qualcomm Snapdragon
devices. This controller implements SDHCI 2.0 interface but requires
vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).
Signed-off-by: Mateusz Kulikowski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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The Allwinner A64 SoC is used in the Pine64. This patch adds
all bits necessary to compile U-Boot for it running in AArch64
mode.
Unfortunately SPL is not ready yet due to legal problems, so
we need to boot using the binary boot0 for now.
Signed-off-by: Siarhei Siamashka <[email protected]>
[agraf: remove SPL code, move to AArch64]
Signed-off-by: Alexander Graf <[email protected]>
Acked-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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Some parts of the sunxi code cast explicitly between u32 values and pointers.
This is not a problem in practice, because all 64bit SoCs today only use the
lower 32 bits for their phyical address space. But we need to make sure that
the compiler is sure this is not an accident as well.
Signed-off-by: Alexander Graf <[email protected]>
Acked-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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Currently, fdtdec_get_addr_size() does not support the address
translation, so it cannot handle device trees with non-straight
"ranges" properties. (This would be a problem with DTS for UniPhier
ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada <[email protected]>
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send_cmd response is valid only when no error happened. If an error
occured, let mmc_send_cmd() print the return value to aid debugging.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Correct the indention level of switch..case statements.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Fixes:
drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’:
drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Stephen Warren <[email protected]>
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When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.
Increase the retry count to the same as the timeout value for status
reports.
The real fix is obviously to not base this whole thing on a cycle counter
but on real wall time, but that would be slightly more intrusive.
Signed-off-by: Alexander Graf <[email protected]>
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Boards using the TWL6030 regulator may not all use the LDOs the same way.
Some might also not use MMC1 at all, so VMMC would't have to be enabled.
This delegates TWL6030 MMC power initializations to board-specific functions,
that may still call twl6030_power_mmc_init for the default behavior.
Signed-off-by: Paul Kocialkowski <[email protected]>
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Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC and VAUX1, in doubt.
Signed-off-by: Paul Kocialkowski <[email protected]>
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The original name of this function is unclear. This patch renames this
CRC16 function to crc16_ccitt() matching its name with its
implementation.
To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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This is a device number, and we want to use 'dev' to mean a driver model
device. Rename the member.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Stephen Warren <[email protected]>
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Rename three partition functions so that they start with part_. This makes
it clear what they relate to.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Stephen Warren <[email protected]>
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Use 'struct' instead of a typdef. Also since 'struct block_dev_desc' is long
and causes 80-column violations, rename it to struct blk_desc.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Stephen Warren <[email protected]>
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Add a driver for the on-chip SD/eMMC host controller used by
UniPhier SoC family.
Signed-off-by: Masahiro Yamada <[email protected]>
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Add Arasan SDHCI entry to Kconfig and fix all references.
Signed-off-by: Michal Simek <[email protected]>
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Fix the SoC names in two comments.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Minkyu Kang <[email protected]>
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This driver implements platform specific glue and fixups for
PIC32 internal SDHCI controller.
Signed-off-by: Andrei Pistirica <[email protected]>
Signed-off-by: Sandeep Sheriker Mallikarjun <[email protected]>
Signed-off-by: Purna Chandra Mandal <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
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According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need
to be set an Abort command type when they are sent. So, we remove all
chip-specific #ifdefs and make it available for all platforms.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The MMC spec says "It is strongly recommended for hosts to implement
more than 500ms timeout value even if the card indicates the 250ms
maximum busy length." Even the previous value of 300ms is known to
be insufficient for some cards. So, increase the timeout to 500ms.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Emil Lenchak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Clear high speed bit if it was not supported by
the driver.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Emil Lenchak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Timing issue occurs on eMMC not only when modifying the frequency but
also for all the switch command(CMD6). According to the MMC spec waiting
8 clocks after a switch command would be the thing to do.
This patch allows fixing CPU hang observed when trying to changing the
bus width on a eMMC on SAMA5D4.
Signed-off-by: Gregory CLEMENT <[email protected]>
Tested-by: Marek Vasut <[email protected]> # on DENX MA5D4EV
Acked-by: Marek Vasut <[email protected]>
Tested-by: Andreas Bießmann <[email protected]> # on atngw100
Acked-by: Andreas Bießmann <[email protected]>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <[email protected]>
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At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.
Update the clock drivers and the code that uses them.
Signed-off-by: Simon Glass <[email protected]>
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Use the pwrseq uclass to find a suitable power sequence for the MMC device.
If this is enabled in the device tree, we will pick it up automatically.
Signed-off-by: Simon Glass <[email protected]>
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At present we add driver-model MMC devices in the order we find them. The
'alias' order is not honoured.
It is difficult to fix this for the case where we have holes in the
sequence. But for the common case where the devices are numbered from 0
without any gaps, we can add the devices to the internal data structures
in this order.
Signed-off-by: Simon Glass <[email protected]>
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In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously. Convert all of these to the correct SPDX-License-Identifier
tag.
Signed-off-by: Tom Rini <[email protected]>
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the non-removable property point to sdcard before, it is wrong,
it must point to emmc, correct it.
Signed-off-by: Lin Huang <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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This will allow us to have multiple block device structs each referring
to the same eMMC device, yet different HW partitions.
For now, there is still a single block device per eMMC device. As before,
this block device always accesses whichever HW partition was most recently
selected. Clients wishing to make use of multiple block devices referring
to different HW partitions can simply take a copy of this block device
once it points at the correct HW partition, and use each one as they wish.
This feature will be used by the next patch.
In the future, perhaps get_device() could be enhanced to return a
dynamically allocated block device struct, to avoid the client needing to
copy it in order to maintain multiple block devices. However, this would
require all users to be updated to free those block device structs at some
point, which is rather a large change.
Most callers of mmc_switch_part() wish to permanently switch the default
MMC block device's HW partition. Enhance mmc_switch_part() so that it does
this. This removes the need for callers to do this. However,
common/env_mmc.c needs to save and restore the current HW partition. Make
it do this more explicitly.
Replace use of mmc_switch_part() with mmc_select_hwpart() in order to
remove duplicate code that skips the call if that HW partition is already
selected.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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This will allow the implementation to make use of data in the block_dev
structure beyond the base device number. This will be useful so that eMMC
block devices can encompass the HW partition ID rather than treating this
out-of-band. Equally, the existence of the priv field is crying out for
this patch to exist.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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At present pci_mmc_init() does not correctly use the PCI function since the
list it passes is not terminated. The array size passed to pci_mmc_init() is
actually not used correctly. Fix this and adjust the pci_mmc_init() to scan
all available MMC devices.
Adjust this code to use the new driver model PCI API.
This should move over to the new MMC uclass at some point.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Table 41 of the JEDEC standard for eMMC says that bit 31 of
the command argument is obsolete when issuing the ERASE
command (CMD38) on page 115 of this document:
http://www.jedec.org/sites/default/files/docs/jesd84-B45.pdf
The SD Card Association Physical Layer Simplified Specification also
makes no mention of the use of bit 31.
https://www.sdcard.org/downloads/pls/part1_410.pdf
The Linux kernel distinguishes between secure (bit 31 set) and
non-secure erase, and this patch copies the macro names from
include/linux/mmc/core.h.
Tested-by: Fabio Estevam <[email protected]>
Signed-off-by: Eric Nelson <[email protected]>
Tested-by: Hector Palacios <[email protected]>
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The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking
operations on earlier models.
Guard against their usage by hiding the bit mask macros on those
processors.
These bits are used to prevent glitches when changing clocks on
i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.
>From the i.MX6DQ RM:
To prevent possible glitch on the card clock, clear the
FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
or DVS in System Control Register) or setting RSTA bit.
Signed-off-by: Eric Nelson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
Reviewed-by: Hector Palacios <[email protected]>
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Move the macro into the socfpga_dwmci_clksel().
Signed-off-by: Dinh Nguyen <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[fix parenthesis in the sdmmc_mask]
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There is no sprintf implementation in tiny-printf, so don't try to use
it when tiny-printf if used.
Signed-off-by: Sjoerd Simons <[email protected]>
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Move driver to DM
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Prepare for using DM.
Signed-off-by: Michal Simek <[email protected]>
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Calculate the minimum sd clock based on max clock. This will
be done by add_sdhci() if we pass minimum clock as zero.
It also does based on SD host contoller version.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Convert the SoCFPGA shim for registering the DWMMC driver to DM.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Pantelis Antoniou <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Tom Rini <[email protected]>
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rk3036 mmc do not have internal dma, so we use fifo mode when read
and write data, we get the fifo mode and fifo depth property from
dts, pass to dw_mmc driver.
Signed-off-by: Lin Huang <[email protected]>
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register
emmc and sdcard have different register address, use non-removeable property
to distinguish them.
Signed-off-by: Lin Huang <[email protected]>
Acked-by: Simon Glass <[email protected]>
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some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.
Signed-off-by: Lin Huang <[email protected]>
Acked-by: Simon Glass <[email protected]>
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