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This converts 1 usage of this option to the non-SPL form, since there is
no SPL_MMC_QUIRKS defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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The old SD handling code was huge and could not handle all the details
which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to
another design. Have SDnH a separate clock, use the existing divider
clocks and move the errata handling from the clock driver to the SDHI
driver where it belongs.
Based on Linux series by Wolfram Sang, commit bb6d3fa98a41 ("clk:
renesas: rcar-gen3: Switch to new SD clock handling") and commit
e5f7e81ee430a ("mmc: renesas_sdhi: Parse DT for SDnH")
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Marek: - Add rcar_clk_* prefix to all functions
- Fix missing ~ in GENMASK(a, b), use clrsetbits_le32 instead
- Use DIV_ROUND_CLOSEST, else if parent clock = 199999992 and
rate = 200000000, the divider would be 0 and table lookup
would fail.
- Turn rcar_clk_get_table_val into signed integer, so it can
return 0 as a valid value and negative values as errors.
- Make the code operate on correct clock and add comment
which explains the reasoning behind it.
- Rebase on changes to
clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function
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V3M handles SDnH differently than other Gen3 SoCs, so let's add a
separate entry for that. This will allow better SDnH handling in the
future.
Based on Linux commit 627151b4966f ("mmc: renesas_sdhi: Flag
non-standard SDnH handling for V3M") by Wolfram Sang
Signed-off-by: Hai Pham <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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It is unnecessary, so clean it up.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # update commit message, mention ES3.0
Reviewed-by: Jaehoon Chung <[email protected]>
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Support R8A77961 M3-W+ SoC.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Still uses 0x3 for now, adjust the offset value to TMPPORT3 accordingly
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Adjust HS400 calibration tables based on Linux settings
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Further filter out HS400 support on certain SoCs.
Since M3-W r1.2 does not support HS400, drop the calibration table and
rename the one for M3-W r1.3 to r8a7796_rev13_calib_table
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Early ES revisions of M3-W SoCs requires 4-tap HS400. Reflect the status
from datasheet.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Add support for HS400 in mode2timing array.
Add a quirk for Versal NET platform to indicate that HS400 is supported
through bit63 of capability register.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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Add support for eMMC 5.1 for Versal NET platform
- Add new compatible string(xlnx,versal-net-5.1-emmc).
- Add CONFIG_ARCH_VERSAL_NET condition wherever required.
- Add DLL and Delay Chain mode support
- Add input and output tap delays for eMMC.
- Add Strobe select tap for HS400 mode.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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Add more capable "bkops" command which allows enabling and disabling both
manual and automatic bkops. The existing 'mmc bkops-enable' subcommand is
poorly named to cover all the possibilities, hence the new-ish subcommand.
Note that both commands are wrappers around the same common code.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx chnages for v2023.04-rc1
makefile:
- Add multi_dtb_fit dependency
clk:
- Handle error cases
microblaze:
- Disable falcon mode and cleanup code around
xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing
zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24
versal:
- Remove empty mini config files
versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations
zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy
spi:
- Add support for gigadevice parts
misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings
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tuning_loop_counter is of char type, which is not capable of handling
the entire data range of this variable. This is pointed by below sparse
warning. Change datatype to int to fix this.
warning: comparison is always false due to limited range of data type.
Signed-off-by: Algapally Santosh Sagar <[email protected]>
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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This contains some fixes, and the first bunch of some clean up patches
to get rid of legacy GPIO and PMIC code.
Highlight is the DM AXP PMIC driver, which is required to convert some
drivers over to use DM regulators, and also is required to get rid
of some less optimal PMIC setup code in Trusted Firmware. This isn't
enabled by any defconfig yet, but can be enabled manually and works. For
the full glory some patches are still missing, and this requires more
testing, which would be simpler if the core code is upstream.
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We need extensions to be set up before we start trying to boot any of the
bootdevs. Add a new priority before all the others for tht sort of thing.
Also add a 'none' option, so that the first one is not 0.
While we are here, comment enum bootdev_prio_t fully and expand the test
for the 'bootdev hunt' command.
Signed-off-by: Simon Glass <[email protected]>
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Add a hunter for MMC. This doesn't do anything at present, since MMC is
currently set up when U-Boot starts. If MMC moves to lazy init then we can
add a hunter function.
Signed-off-by: Simon Glass <[email protected]>
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The code in these functions turns out to often be the same. Add a default
get_bootflow() function and allow the drivers to select it by setting
the method to NULL.
This saves a little code space.
Signed-off-by: Simon Glass <[email protected]>
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At present MMC uses the bootdev_setup_for_dev() function to set up the
bootdev. This is because MMC only has one block-device child, so does not
need to worry about naming of the bootdev.
However this inconsistency with other bootdevs that use block devices is a
bit annoying. The only real reason for it is to have a name like
'mmc0.bootdev' instead of 'mmc0.blk.bootdev'.
Update bootdev_setup_sibling_blk() to drop '.blk' from the name where it
appears, thus removing the only reason to use the bootdev_setup_for_dev().
Switch MMC over to the subling function.
Signed-off-by: Simon Glass <[email protected]>
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When running multiple tests the mmc emulator calls malloc() to obtain the
memory for its disk image. Since the memory is not cleared, it is possible
that it happens to contain a partition table.
The dm_test_part() test (for one) relies on mmc0 being empty on startup.
Zero the memory to ensure that it is.
Signed-off-by: Simon Glass <[email protected]>
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As the SPL code for sunxi boards does not use the driver model, we have
two mmc_ops structures, one for DM, one for non-DM. The actual hardware
access code is shared, with the respective callback functions using that
common code.
To make this more obvious and easier to read, reorder the functions to
group them: we first have the common code, then the non-DM bits, and
the proper DM implementation at the end.
Also document this structure in the comment at the beginning of the file.
No functional change intended.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Tested-by: Samuel Holland <[email protected]>
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The sunxi MMC code does not use the DM in the SPL, as we don't have a
device tree available that early, also no space for it.
This also means we cannot access the card-detect GPIO information from
there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each
board has to define. This is a burden, also requires extra GPIO code in
the SPL.
As the SPL is the natural successor of the BootROM (from which we are
loaded), we can actually ignore the CD pin completely, as this is what
the BootROM does as well: CD GPIOs are board specific, but the BootROM
is not, so accesses the MMC devices anyway.
Also, as we must have been loaded from an MMC device when reaching this
code, there must have been a card in the slot.
Remove the card detect code from the non-DM implementation of the sunxi
MMC driver, to get rid of this unneeded code.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Tested-by: Samuel Holland <[email protected]>
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This converts the following to Kconfig:
CONFIG_FSL_ESDHC_PIN_MUX
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_FLASH_SPANSION_S29WS_N
CONFIG_FLASH_VERIFY
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
CONFIG_FSL_ISBC_KEY_EXT
CONFIG_FSL_TRUST_ARCH_v1
CONFIG_FSL_SDHC_V2_3
CONFIG_MAX_DSP_CPUS
CONFIG_MIU_2BIT_INTERLEAVED
CONFIG_SERIAL_BOOT
CONFIG_SPI_BOOTING
CONFIG_X86EMU_RAW_IO
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_HSMMC2_8BIT
Signed-off-by: Tom Rini <[email protected]>
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The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_MMC_MAX_BLK_COUNT
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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When MMC_WRITE is disabled this driver produced a build error. Fix this.
Also update a comment while we are here.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Use the correct SPL_TPL_ variable so that these features can be enabled in
TPL and VPL as needed.
Disable it by default in TPL to avoid any code-size increase. No boards
are actually using it since the Makefile rules don't allow including
drivers/block/ with TPL_DM enabled. It can be manually enabled as needed.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Correct pointer dereferencing check to be more consistent.
Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:
mask = dwmci_readl(host, DWMCI_RINTSTS);
// Hardware asserts DWMCI_INTMSK_DTO here
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
if (mask & DWMCI_INTMSK_DTO) {
// Unreachable as DTO is cleared without being handled!
return 0;
}
Only clear interrupts that we have seen and are handling so that DTO is
not missed.
Signed-off-by: John Keeping <[email protected]>
Tested-by: Jerome Forissier <[email protected]> (Rock PI 4B)
Tested-by: Quentin Schulz <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.
Signed-off-by: Yann Gautier <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.
Signed-off-by: Yann Gautier <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.
Signed-off-by: Yann Gautier <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.
Signed-off-by: Kunihiko Hayashi <[email protected]>
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This patch defines a quirk to disable the block count
for single block transactions.
This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.
Signed-off-by: Sergei Antonov <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Move init_clk_usdhc to non-clk driver case, since assigned-clocks properties
will initialize the clocks by clk driver.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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There is a number of users that use uclass_first_device to access the
first and (assumed) only device in uclass.
Some check the return value of uclass_first_device and also that a
device was returned which is exactly what uclass_first_device_err does.
Some are not checking that a device was returned and can potentially
crash if no device exists in the uclass. Finally there is one that
returns NULL on error either way.
Convert all of these to use uclass_first_device_err instead, the return
value will be removed from uclass_first_device in a later patch.
Signed-off-by: Michal Suchanek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Firmware calls need node_id which is basically "power-domains" id.
At present static values are used based on the "device_id" property of
dt.
Instead of this, read "power-domains" id from dt and use it. Add a
element called node_id in priv structure and read it from dt. Replace
static node_id with this priv->node_id across the driver.
Since "device_id" is not used anywhere else simply remove it.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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In Versal platform power domain node_id is bigger than u8, hence
change prototype to u32 to accommodate. Change u8 to u32 in the function
prototypes that use node_id and remove casting to u32 from
xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Use the word 'uclass' instead of 'if_type' to complete the conversion.
Signed-off-by: Simon Glass <[email protected]>
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Add eMMC and SDXC support for MediaTek MT7981/MT7986 SoCs
Both chips support SDXC and eMMC 4.5. MT7986A supports eMMC 5.1.
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Daniel Golle <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.01 cycle:
This feature set includes the important update on PIO4 pinctrl driver
that solves a long time mismatch between Linux and U-boot, related on
the unification of pinctrl and gpio driver support, now respecting the
pinctrl bindings ABI; and also support for pinctrl subnodes. The feature
set also adds support for PDA screen detection for sam9x60_curiosity
board , one fix for SD-Card reinsertion and one fix for sam9x60 clocks.
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Signed-off-by: Tom Rini <[email protected]>
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Whenever the SD Card would be removed and then re-inserted while in the
U-Boot command line, the `SDBPWR` bit of the `SDMMC_PCR` register would
remain unset afterwards. In order for the bit to be set again after
re-insertion, register an additional `deferred_probe` method that the
DM would then transparently call. This method will call the generic
`sdhci_probe` which will, during its execution flow, set this bit to 1.
Signed-off-by: Sergiu Moga <[email protected]>
Reported-by: Mihai Sain <[email protected]>
Reviewed-by: Eugen Hristev <[email protected]>
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