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mmc_spi_sendcmd(), mmc_spi_readdata() and mmc_spi_writedata() are
currently undocumented. Add comment blocks to explain the arguments
and the return value.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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After command is sent and before card response shows up on the line,
there is a variable number of clock cycles in between called Ncr.
The spec [1] says the minimum is 1 byte and the maximum is 8 bytes.
Current logic in mmc_spi_sendcmd() has a flaw that it could only work
with certain SD cards with their Ncr being just 1 byte.
When resp_match is false, the codes try to receive only 1 byte from
the SD card. On the other hand when resp_match is true, the logic
happens to be no problem as it loops until timeout to receive as many
bytes as possible to see a match of the expected resp_match_value.
However not every call to mmc_spi_sendcmd() is made with resp_match
being true hence this exposes a potential issue with SD cards that
have a larger Ncr value.
Given no issue was reported as of today, we can reasonably conclude
that all cards being used on the supported boards happen to have a 1
byte Ncr timing requirement. But a broken case can be triggered by
utilizing QEMU to emulate a larger value of Ncr (by default 1 byte
Ncr is used on QEMU). This commit fixes such potential spec violation
to improve the card compatibility.
[1] "Physical Layer Specification Version 8.00"
chapter 7.5.1: Command / Response
chapter 7.5.4: Timing Values
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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The argument check should happen before any transfer on the SPI lines.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add some verbose debug output when crc16 check fails.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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After issuing the switch command: Wait until 'current state' of the card
status becomes 'tran'. This prevents from response timeout at the next
command because of 'current state' = 'data'.
Signed-off-by: Stefan Bosch <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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If DMA(SDMA or ADMA) is not used, the cache invalidation
after reading is no need, should be skipped. Otherwise
U-Boot may hang at the cache invalidation.
Found this issue and tested this fix on DragonBoard 410c.
Fixes: commit 4155ad9aac94 ("mmc: sdhci: fix missing cache invalidation after reading by DMA")
Signed-off-by: Yuezhang.Mo <[email protected]>
Reviewed-by: Andy Wu <[email protected]>
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Initialize an err variable to 0.
Signed-off-by: Jaehoon Chung <[email protected]>
Reported-by: Coverity (CID: 313548)
Reviewed-by: Tom Rini <[email protected]>
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This will allow us to use DM variants of phys_to_bus()/bus_to_phys()
when relevant.
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Peter Robinson <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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- Merge the patch to take <asm/global_data.h> out of <common.h>
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Call mmc_of_parse() so that generic DT properties like 'non-removable'
are taken into account.
This fixes boot on Clearfog with eMMC on SOM that requires the
non-removable property.
Reported-by: Thorsten Spille <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
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Use the generic sdhci_set_control_reg() instead of duplicating
in platform driver.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.
To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.
Use the sdhci writeb callback to implement this condition.
[1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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With the new SW tuning App note[1], a custom tuning algorithm is
required for eMMC HS200, HS400 and SD card UHS modes. The algorithm
involves running through the 32 possible input tap delay values and
sending the appropriate tuning command (CMD19/21) for each of them
to get a fail or pass result for each of the values. Typically, the
range will have a small contiguous failing window. Considering the
tuning range as a circular buffer, the algorithm then sets a final
tuned value directly opposite to the failing window.
[1] https://www.ti.com/lit/pdf/spract9
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add support for writing new clock buffer select property for both
the am654x and j721e 4 bit IPs
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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DLL need only be enabled for speed modes and clock frequencies at or
above 50 MHz. For speed modes that don't enable the DLL, we need to
configure a static input delay value. This involves reading an optional
itap-del-sel-* value from the device tree and configuring it for the
appropriate speed mode.
Therefore, move all dll configurations to their own functions and gate it
with 50 MHz speed and a minimum mode. If both these conditions are not
satisfied then configure delay chain modes.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add Support for AM65x PG2.0. Use the SoC bus framework to fixup
the platform data and do DLL calibration if the revision is 1.0
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB
flag to indicate the same.
Also move the write of trm_icp and driver strength to the set_clock()
function to match the kernel configuration flow.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Convert the flags field defines to use the BIT() macro.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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There are some speed modes that work without switching the dll on.
Unconditionally switch off the DLL before setting clock frequency to
support this case. The software will automatically enable DLL for speed
modes that require it. This also means the dll_on priv data member is no
longer required.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Move this out of the common header and include it only where needed. In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly. Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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The R-Car3 SDHI should set these two bits in DMA_MODE register according
to the specification, to indicate 64bit bus width. No other bus width
options are permitted and the default value is 0, which is incorrect.
Set the bits accordingly.
Signed-off-by: Marek Vasut <[email protected]>
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Set this flag so that it is available to those looking at the device. For
non-removable devices there is no need to check for insertion/removable
since the media can never change.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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At present if an eMMC part is in the system, the ACPI table generated
will include information about that, as well as the SD card. We only need
to include the SD card, since it has a card-detect GPIO. Use a different
compatible string for each option, and add code only for the SD card.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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This change extends previous commit 061c6d1b238a ("arm: mvebu: Espressobin:
Detect presence of emmc at runtime") and when emmc is not present then emmc
is removed from U-Boot DM and corresponding slot is disabled. Therefore on
Espressobin board without soldered emmc, state of emmc hw should be same as
if emmc was disabled in DTS.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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- New Allwinner H616 SoC support (sans Ethernet & USB)
- H6 DT update
- Tanix TX6 TV box support
- OrangePi 3 support
- OrangePi Zero2 (H616) support
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So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid becoming trapped with some compatible fallback strings, let's
remove the whole struct sunxi_mmc_variant, and replace this with a SoC
based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols.
This will later simplify H616 support.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- MIPS: add support for Mediatek MT7620 SoCs
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Changes for 2020.04
-------------------
- new board:
Phytec phyCORE-i.MX8MP
i.MX8MN Beacon EmbeddedWorks devkit
- Fixes:
several nanbcb fixes
fix for imx8mm_beacon
- further switch to distro boot commands
- DM:
DM Ether for MX6UL
CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
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Currently this driver does not set the value of plat->cfg.f_max, which
results in that MMC framework will always run at the lowest frequency.
This patch sets plat->cfg.f_max to the maximum allowed frequency, which
equals to the source clock frequency.
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.
This patch adds default pad control settings for mt7620_compat.
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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It turns out that the sclk cycles used by mt7620/mt7628 is the same as
other chips (20 bits, 1048576), not 65536.
This patch removes sclk_cycle_shift from dev_comp, and uses a macro with
a value 20 instead.
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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prevent unsued variable compiler warning if
DM_REGULATOR is not set.
Signed-off-by: Heiko Schocher <[email protected]>
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There is no need to define the same macros in drivers.
All macros have been added by commit 17a42abb40dd ("mmc: Define timing
macro's").
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.
Signed-off-by: Harm Berntsen <[email protected]>
CC: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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In non-secure mode (EL2), MMC driver calls the SMC/PSCI services
provided by ATF to set SDMMC's DRVSEL and SMPLSEL.
Signed-off-by: Chee Hong Ang <[email protected]>
Signed-off-by: Siew Chin Lim <[email protected]>
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Change 'clksel' callback function to allow the code to return a
status.
This patch is a preparation for enabling Arm-Trusted-Firmware (ATF)
in Intel SoC FPGA. This patch does not change functionality.
When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock
related register is secure register which is required to be written
via SMC/PCSI call. It is possible that U-Boot fail to write the
register if there is unexpected error between U-Boot and ATF.
As a result, there maybe signal integrity on MMC connection due to
clock. So, the code should reports error to user when 'clksel' fail.
Signed-off-by: Siew Chin Lim <[email protected]>
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Define LOG_CATEGORY, use dev_ macro when it is possible.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Remove unused function in exynos_dw_mmc.c.
Signed-off-by: Jaehoon Chung <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
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Prepare v2021.01-rc5
Signed-off-by: Tom Rini <[email protected]>
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We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but
in every other case we just use DM_. Update the alias macros to use the
DM_ prefix.
We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro
is widely used and there is at least some benefit to indicating it us a
U-Boot driver, particularly for code ported from Linux. So for now, let's
keep that name.
Signed-off-by: Simon Glass <[email protected]>
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At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.
Signed-off-by: Simon Glass <[email protected]>
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We have two functions which do the same thing. Standardise on
dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in
normal operation: it is either null or missing.
Also move the functions into one place.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
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We use 'ofnode' rather than 'of_node' in U-Boot. Rename this function to
fit.
Signed-off-by: Simon Glass <[email protected]>
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Most drivers use these access methods but a few do not. Update them.
In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Andy Shevchenko <[email protected]>
Acked-by: Pratyush Yadav <[email protected]>
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Currently, when different spi slaves claim the bus consecutively using
spi_claim_bus(), spi_set_speed_mode() will only be executed on the first
two calls, leaving the bus in a bad state starting with the third call.
This patch drops spi_slave->speed member and adds caching of bus
speed/mode in dm_spi_bus struct. It also updates spi_claim_bus() to call
spi_set_speed_mode() if either speed or mode is different from what the
bus is currently configured for. Current behavior is to only take into
account the speed, but not the mode, which seems wrong.
Fixes: 60e2809a848 ("dm: spi: Avoid setting the speed with every transfer")
Reviewed-by: Simon Glass <[email protected]>
Reported-by: Rasmus Villemoes <[email protected]>
Reported-by: Moshe, Yaniv <[email protected]>
Signed-off-by: Ovidiu Panait <[email protected]>
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