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This driver has not been converted to DM_ETH. The migration
deadline passed 2 years ago.
Cc: Trevor Woerner <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Ramon Fried <[email protected]>
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This driver has not been converted to DM_ETH. The migration deadline
passed 2 years ago.
Cc: Linus Walleij <[email protected]>
Cc: David Feng <[email protected]>
Cc: Liviu Dudau <[email protected]>
Cc: Andre Przywara <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Ramon Fried <[email protected]>
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NPCM750 provides identical ethernet MAC controllers for WAN/LAN applications.
Signed-off-by: Jim Liu <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Move i.MX code to a standalone file to make it easy for adding new
platform support
Reviewed-by: Ramon Fried <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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This patchs adds the ethernet & MDIO driver for the MIPS Octeon II / III
SoC platform. Please note that these drivers are based on the 2013
U-Boot version from Marvell and make use of the platform supported
helper functions for the ethernet functionality, including stuff like
SFP handling.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Joe Hershberger <[email protected]>
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There are no platforms for this architecture anymore, remove unused
code.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled by any board and not converted to DM_ETH.
Remove.
Signed-off-by: Tom Rini <[email protected]>
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Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
Signed-off-by: Roman Bacik <[email protected]>
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Signed-off-by: Ramon Fried <[email protected]>
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Add a driver for the MDIO interface for Aspeed AST2600 SOC. The driver
only supports clause 22 for now.
Signed-off-by: Dylan Hung <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
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The SJA1105 driver is largely reused from Linux. Its programming model
is that it is blank out of reset, and it waits for a static
configuration stream over SPI, which contains all runtime parameters (it
has no notion of "default values").
Keeping a binary array for the configuration stream would have meant
that aspects such as the CPU port and the MAC speeds could have not been
configured easily, and would have been static and board-dependent.
Live-patching the binary array means recalculating the static config
table CRCs, which is not a fun process.
So we create an abstraction over the static config tables, using the
packing API, same as in Linux. The tables are kept as C structures, and
the binary configuration stream is constructed on-the-go, with CRC and
all.
All static config tables instantiated in this driver are mandatory.
The hardware reference manual can be found at:
https://www.nxp.com/docs/en/user-guide/UM10944.pdf
For tagging, a simplified version of tag_8021q from Linux is used. The
VLAN EtherType is the same (0xdadb) but since we don't want switching in
U-Boot, there is no reason to have a TX VLAN and an RX VLAN for each
port. We just need the RX VLANs to act as the unique pvid of each
front-panel port, to decode the switch port number. The RX VLAN is used
for both RX and TX.
The device tree bindings are the same as in Linux.
Signed-off-by: Vladimir Oltean <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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AT91EMAC driver is unused, thus removing.
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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The code under drivers/net is related to ethernet networking drivers, in
some fashion or another. Drop these from the top-level Makefile and
also move the phy rule into drivers/net/Makefile which is where it
belongs. Make the new rule for drivers/net check for the build-stage
relevant ETH symbol.
Fix up some Kconfig dependencies while we're here to mirror how the
Makefile logic now works.
Signed-off-by: Simon Glass <[email protected]>
[trini: Introduce ETH, Kconfig dependency changes, am43xx fix]
Signed-off-by: Tom Rini <[email protected]>
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Add support for xilinx multirate(MRMAC) ethernet driver.
This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC.
Added support for 4 ports of MRMAC for speeds 10G and 25G.
MCDMA supports upto 16 channels but in this driver we have setup only
one channel which is enough.
Tested 10G and 25G on all 4 ports.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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The Microchip KSZ9477/KSZ9897/KSZ9567 7-Port Gigabit Ethernet Switches
support SGMII/RGMII/MII/RMII with register access via SPI, I2C, or MDIO.
This driver currently supports I2C register access but SPI or MDIO register
access can be easily added at a later time.
Tagging is not implemented and instead the active port is tracked to
avoid needing a tag to store port information.
This was tested with the imx8mm-venice-gw7901 board which has a
KSZ9897S switch with an IMX8MM FEC MAC master connected via RGMII_ID.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Add SynQuacer's NETSEC GbE controller driver.
Since this driver will load the firmware from SPI NOR flash,
this depends on CONFIG_SYNQUACER_SPI=y.
Signed-off-by: Jassi Brar <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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With the last user of this driver removed, remove the driver.
Reviewed-by: Daniel Schwierzeck <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.
The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:
=> setenv ethact lan0
=> ping 1.2.3.5
Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.
I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.
Signed-off-by: Alex Marginean <[email protected]>
Signed-off-by: Claudiu Manoil <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Vladimir Oltean <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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This adds a proper glue driver for the Designware DWMAC ethernet MAC IP
found in the Amlogic Meson8, GXBB, GXL, GXM, G12A, G12B & SM1 SoCs.
This is aimed to replace the static ethernet link setup found on the board
init code for the Amlogic SoC based boards.
Tested on a libretech-cc (S905x Internal RMII 10/100 PHY) and Khadas VIM3 (A113d
with external 10/100/1000 RGMII PHY) to cover the most extreme setups.
Signed-off-by: Neil Armstrong <[email protected]>
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The Amlogic G12A & compatible SoCs embeds a mux to either communicate with
the external PHY or the internal 10/100 PHY.
This adds support for this mux as a MDIO MUX device.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Add support for MMIO register MDIO muxes based on the Linux mdio-mux-mmioreg driver.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Patch-cc: Nobuhiro Iwamatsu <[email protected]>
Patch-cc: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Add Cortina Access Ethernet device driver for CAxxxx SoCs.
This driver supports both legacy and DM_ETH network models.
Signed-off-by: Aaron Tseng <[email protected]>
Signed-off-by: Alex Nemirovsky <[email protected]>
Signed-off-by: Abbie Chang <[email protected]>
CC: Joe Hershberger <[email protected]>
CC: Abbie Chang <[email protected]>
CC: Tom Rini <[email protected]>
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This patch adds ethernet driver for MediaTek MT7620 SoC.
The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).
The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.
This driver supports MT7530 giga switch connects to port 5.
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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This adds the driver for the IPQ40xx built-in MDIO.
This will be needed to support future PHY driver.
Signed-off-by: Robert Marko <[email protected]>
Cc: Luka Perkov <[email protected]>
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Adds support for Network Interface controllers found on
OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Adds support for Network Interface controllers found on
OcteonTX SoC platforms.
Signed-off-by: Suneel Garapati <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Cc: Joe Hershberger <[email protected]>
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add DM/DTS support for the UEC ethernet on QUICC Engine
Block.
Signed-off-by: Heiko Schocher <[email protected]>
Patch-cc: Mario Six <[email protected]>
Patch-cc: Qiang Zhao <[email protected]>
Patch-cc: Holger Brunck <[email protected]>
Patch-cc: Madalin Bucur <[email protected]>
Series-changes: 3
- revert:
commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled")
as now qe works with DM and DM_ETH support.
- fix mailaddress from Holger
Series-changes: 2
- add comments from Qiang Zhao:
- add device node documentation
- I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c
because using drivers/net/fsl_mdio.c leads in none existent
udevice mdio@3320
instead boards with DM ETH support should use now this
driver.
- remove RFC tag
Commit-notes:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This Code should be removed if all boards are converted
to DM/DTS.
- add the DM based qe uec driver under drivers/net/qe
- Therefore copied the files uccf.c uccf.h uec.h from
drivers/qe. So there are a lot of Codingstyle problems
currently. I fix them in next version if this RFC
patch is OK or it needs some changes.
- The dm based driver code is now under drivers/net/qe/dm_qe_uec.c
Used a lot of functions from drivers/qe/uec.c
- seperated the PHY specific code into seperate file
drivers/net/qe/dm_qe_uec_phy.c
END
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This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.
Undocumented bit that programs the PHY interface select register
comes from vendor source.
It has been tested on Cubieboard7-lite based on S700 SoC.
Signed-off-by: Amit Singh Tomar <[email protected]>
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For dual ethernet controllers, the HW design may connect ETH phys to
one MDIO ports. So two different ethernet drivers have to share MDIO bus.
Since two ethernet drivers are independent, we can't ensure their probe
order.
To resolve this problem, introduce an eth phy generic driver and uclass.
After eth-uclass binds, we search the mdio node and binds the phy node
with the eth-phy-generic driver.
When one eth driver get its phy device, the parent of phy device will
probe prior than phy device. So this ensure the eth driver ownes the
MDIO bus will be probed before using its MDIO.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add a driver for the MDIO interface integrated in the mEMAC (Multi-rate
Ethernet Media Access Controller) and the Fman 10G Ethernet MACs.
Signed-off-by: Ioana Ciornei <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The Broadcom GENET Ethernet MACs are used in several MIPS based SoCs
and in the Broadcom 2711/2838 SoC used on the Raspberry Pi 4.
There is no publicly available documentation, so this driver is based
on the Linux driver. Compared to that the queue management is
drastically simplified, also we only support version 5 of the IP and
RGMII connections between MAC and PHY, as used on the RPi4.
Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
[Andre: heavy cleanup and a few fixes]
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Corentin Labbe <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a driver
must guarantee non-concurrent accesses to this MDIO interface. The
most logical way is to have a separate driver that handles this
single MDIO interface, used by all Ethernet ports.
*) The MDIO interface is the same between the existing mv643xx_eth
driver and the new mvneta/mvpp2 driver. Even though it is for now
only used by the mvneta/mvpp2 driver, it will in the future be
used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma <[email protected]>
Signed-off-by: Alex Marginean <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This reverts commit d9a9174fa5687521035b2ec82cce86cdcf4f36e6.
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This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.
Signed-off-by: Catalin Horghidan <[email protected]>
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.
Signed-off-by: Alex Marginean <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon
SoCs like Hi3798CV200. It's based on a downstream U-Boot driver, but
quite a lot of code gets rewritten and cleaned up to adopt driver model
and PHY API.
Signed-off-by: Shawn Guo <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.
Signed-off-by: Horatiu Vultur <[email protected]>
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