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Replace CONFIG_PPC_T1040 with ARCH_T1040 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_T1024 with ARCH_T1024 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_T1023 with ARCH_T1023 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_B4420 with ARCH_B4420 in Kconfig and clean up
existing macros.
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Use CONFIG_TARGET_B4860QDS instead.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_B4860 with ARCH_B4860 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_P5040 with ARCH_P5040 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_P5020 with ARCH_P5020 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_P4080 with ARCH_P4080 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_P3041 with ARCH_P3041 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_PPC_P2041 with ARCH_P2041 in Kconfig and clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
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P1017 is a single-core version of P1023. There is no P1017 target
configured. Drop related macros. P1017 SoC is still supported.
Signed-off-by: York Sun <[email protected]>
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Replace CONFIG_P1023 with ARCH_P1023 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <[email protected]>
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Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Ashish Kumar <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Patch queue for efi - 2016-11-17
Highlights this time around:
- x86 efi_loader support
- hello world efi test case
- network device name is now representative
- terminal output reports modes correctly
- fix psci reset for ls1043/ls1046
- fix efi_add_runtime_mmio definition for x86
- efi_loader support for ls2080
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On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.
Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.
So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.
For existing boot scripts, nothing should change with this patch.
Signed-off-by: Alexander Graf <[email protected]>
Reviewed-by: York Sun <[email protected]>
[agraf: Fix x86 build]
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Correct the SGMII enable bit position to 27 instead
of 31.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Modify the nwcfg bit definitions to have 32-bit
by removing the extra nibble.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Commit 5a49f17481bb ("net: mii: Use spatch to update miiphy_register")
updated the mvgbe implementation of smi_reg_read/smi_reg_write. Prior to
that change mvgbe_phy_read and mvgbe_phy_write where used as wrappers to
satisfy the phylib APIs. Because these functions weren't updated in that
commit build errors where triggered when CONFIG_PHYLIB was enabled.
Fix these build errors by removing mvgbe_phy_read and mvgbe_phy_write
and using smi_reg_read/smi_reg_write directly.
Signed-off-by: Chris Packham <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms
specified by the IEEE802.3 standard from the chip's default of 8ms.
For more details, see the "Auto-Negotiation Timing" section of the
KSZ9031RNX datasheet.
[1] https://patchwork.kernel.org/patch/6558371/
Signed-off-by: Ash Charles <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This driver supports the Synopsys Designware Ethernet QoS (Quality of
Service) a/k/a eqos IP block, which is a different design than the HW
supported by the existing designware.c driver. The IP supports many
options for bus type, clocking/reset structure, and feature list. This
driver currently supports the specific configuration used in NVIDIA's
Tegra186 chip, but should be extensible to other combinations quite
easily, as explained in the source.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]> # V1
Acked-by: Joe Hershberger <[email protected]>
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Cover-Letter: Fixes several spelling errors for the words "resetting",
"extended", "occur", and "multiple".
Signed-off-by: Vagrant Cascadian <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
Conflicts:
common/Kconfig
configs/dms-ba16_defconfig
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Added kconfig for FEC_MXC driver.
Cc: Joe Hershberger <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Commit b02e4044ff8e ("libfdt: Bring in upstream stringlist
functions") broke codying style in some places especially
by inserting an extra whitespace before fdt_stringlist_count().
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Simon Glass <[email protected]>
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These two files have patch merge markers in them, within comments or
strings. Remove then, so that a search for merge markers does not show up
matches in these files.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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The signature for this macro has changed. Bring in the upstream version and
adjust U-Boot's usages to suit.
Signed-off-by: Simon Glass <[email protected]>
Update to drivers/power/pmic/palmas.c:
Signed-off-by: Keerthy <[email protected]>
Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
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These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.
This applies the following upstream commits by
Thierry Reding <[email protected]> :
604e61e fdt: Add functions to retrieve strings
8702bd1 fdt: Add a function to get the index of a string
2218387 fdt: Add a function to count strings
Signed-off-by: Simon Glass <[email protected]>
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The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.
Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.
Signed-off-by: Peter Chubb <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Signed-off-by: Chris Packham <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.
Signed-off-by: Chris Packham <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.
The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().
Other than that it's just a matter of adding the appropriate chip
IDs.
Signed-off-by: Chris Packham <[email protected]>
Cc: Joshua Scott <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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source selection
cpsw driver supports only selection of phy mode in control module
but control module has more setting like RGMII ID mode selection,
RMII clock source selection. So ported to cpsw-phy-sel driver
from kernel to u-boot.
Signed-off-by: Mugunthan V N <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.
Reviewed-by: Sekhar Nori <[email protected]>
Signed-off-by: Mugunthan V N <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.
This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)
Signed-off-by: Andrea Merello <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Fix various misspellings of:
* deprecated
* partition
* preceding,preceded
* preparation
* its versus it's
* export
* existing
* scenario
* redundant
* remaining
* value
* architecture
Signed-off-by: Robert P. J. Day <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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when using tftp on the smartweb board, it prints a lot of
CACHE: Misaligned operation at range [23b2e000, 23b2e100]
warnings ... fixed them.
Signed-off-by: Heiko Schocher <[email protected]>
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This patch adds support for the Armada 3700 SoC to the Marvell mvneta
network driver.
Not like A380, in Armada3700, there are two layers of decode windows for GBE:
First layer is: GbE Address window that resides inside the GBE unit,
Second layer is: Fabric address window which is located in the NIC400
(South Fabric).
To simplify the address decode configuration for Armada3700, we bypass the
first layer of GBE decode window by setting the first window to 4GB.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Nadav Haklai <[email protected]>
Cc: Kostya Porotchkin <[email protected]>
Cc: Wilson Ding <[email protected]>
Cc: Victor Gu <[email protected]>
Cc: Hua Jing <[email protected]>
Cc: Terry Zhou <[email protected]>
Cc: Hanna Hawa <[email protected]>
Cc: Haim Boot <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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The mvneta driver is also used on the ARMv8 64bit Armada 3700 SoC. This
patch fixes the compilation warnings seen on this 64bit platform.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Nadav Haklai <[email protected]>
Cc: Kostya Porotchkin <[email protected]>
Cc: Wilson Ding <[email protected]>
Cc: Victor Gu <[email protected]>
Cc: Hua Jing <[email protected]>
Cc: Terry Zhou <[email protected]>
Cc: Hanna Hawa <[email protected]>
Cc: Haim Boot <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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check_cache_range() warns that the top boundaries are not properly
aligned when flushing or invalidating the buffers and make these
operations fail.
This gets rid of the warnings:
CACHE: Misaligned operation at range ...
Signed-off-by: Stefan Roese <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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trini: Drop local memset() from
examples/standalone/mem_to_mem_idma2intr.c
Signed-off-by: Tom Rini <[email protected]>
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Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <[email protected]>
CC: Mingkai Hu <[email protected]>
CC: Gong Qianyu <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.
<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.
Signed-off-by: Masahiro Yamada <[email protected]>
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini <[email protected]>
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Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <[email protected]>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <[email protected]>
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The pch_gbe driver previously casted pointers to & from unsigned 32 bit
integers in many locations. This breaks the driver on 64 bit systems,
producing streams of compiler warnings about mismatched pointer &
integer sizes and then failing to keep track of addresses correctly at
runtime.
Fix the driver for 64 bit systems by using unsigned longs in place of
the previously used 32 bit integers.
Signed-off-by: Paul Burton <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Reading the PCI BAR & converting the result to a physical address is not
safe across all architectures. For example on MIPS the virtual:physical
mapping is not 1:1, so we cannot directly make use of the physical
address.
Use the more generic BAR-mapping function dm_pci_map_bar to discover the
MMIO base address, which should work across architectures.
Signed-off-by: Paul Burton <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]>
Reviewed-by: Paul Burton <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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out_be32 and in_be32 are actually #defined to little endian
writel/readl in arch/microblaze.
Just use __raw_writel/readl instead. That is also what is used
in the Linux kernel driver for this IP block
Tested on MIPSfpga. Can tftp a kernel.
Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]>
Reviewed-by: Paul Burton <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Virtual to physical mapping isn't necessarily 1:1 for all architectures
Using ioremap_nocache allows for the arch code to translate the
physical address to a virtual address.
Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]>
Reviewed-by: Paul Burton <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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