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Management Complex FW 9.0 set the hardware depletion to be 20
buffers in order to support multiple pools in DPNI. This requires
driver to fill the pool with at least 21 to be able to receive
frames. So, Increase number of buffers for a pool.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Management Complex FW 9.0 puts a new requirement to provide Tx
confirmation and error queue configuration by calling
dpni_set_tx_conf API.
Configure report of only error frames for a tx frame.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Management Complex FW 9.0 puts a new requirement to prepare extended
parameters which should be provided as input in dpni_create. extended
parameters includes traffic class and IP reassembly configurations.
So prepare extended parameters with default "0" as input for
dpni_create.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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MC firmware version 9.0.0 contains
- Support of new APIs
- Update in existing APIs
- Change in Major and minor version of DPAA2 objects
This patch contains modifications in FLIB files to support new
MC firmware version.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Check and compare version of management complex's object with
the version supported by Freescale ldpaa2 ethernet driver.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Size of this snprintf "lltemac.%lx" is bigger than 16 characters.
Replacing it with "ll_tem.%lx"
Signed-off-by: Ricardo Ribalda Delgado <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
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MDC setting depends on pclk input clocks which varies across SoC. This
driver is used by xilinx zynq and zynqmp SOC.
Input clock frequence on silicon is 125MHz where divider 64 put
frequency below 2.5MHz requires by spec (125/64=1.95).
Signed-off-by: Michal Simek <[email protected]>
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Enable automatic crossover cable detection.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Add PHYLIB and MII dependencies and enable it by default for Microblaze.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Pass pointer to core to handle packet.
Signed-off-by: Michal Simek <[email protected]>
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Rename start and stop functions to align with DM functions names.
Signed-off-by: Michal Simek <[email protected]>
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Move driver to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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When IP is configured with pong buffers, IP is receiving packets to ping
and then to pong buffer and than ping again.
The original logic in the driver remains there that when ping buffer is
free, pong buffer is checked too and return if both are free.
Signed-off-by: Michal Simek <[email protected]>
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The original logic in the driver was exchanging buffers which are used for
sending packet and tx_ping and tx_pong buffers were exchanged all the
time to ensure that IP has enough time to send the packet out.
Based on this "feature" send function was using nextbuffertouse variable
to save which buffer should be used.
Before this algorithm was called driver checked that there is free
buffer available.
This checking remains in the driver but driver tries to use tx_ping
first if available. If not, tx_pong buffer is used instead.
To reach this code the original condition is met that at least one of the
buffer should be available.
Testing doesn't show any performance drop when this patch is applied.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This flag is not documented anywhere in the latest documentation that's
why this patch removes it.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Simplify logic how to find out if there is free TX buffer.
Both buffers are checked all the time that's why logic around order
can be removed.
Also add check when only one buffer is available.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Move to use indirect register access when timeout expires for resetting
TX buffers.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Do initialization via indirect register access.
Signed-off-by: Michal Simek <[email protected]>
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Do initialization via indirect register access.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Use u-boot coding style how to setup and access MDIO bus.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Add MDIO support before move to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Prepare for DM move.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Also add dependency on PHYLIB and MII which is required.
Clean PHYLIB dependency from the driver too.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Rename few functions to fit to the new name convention used by DM.
Suggested-by: Joe Hershberger <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Call net_process_received_packet() by core.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Detect phy when driver probes.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Move driver to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Use axidma_priv instead of ethdevice in preparation of the DM move.
Signed-off-by: Michal Simek <[email protected]>
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Prepare for move to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Saving iobase directly to private structure helps with moving to DM.
There is an option to load iobase from pdata but it is additional load.
Pointer to private structure is available all the time.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Simplify mdio_wait function by passing regs directly.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Fix debug message.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Fix these compilation warning by proper grouping:
In function 'axi_dma_init': drivers/net/xilinx_axi_emac.c:391:7:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
if (!(in_be32(&priv->dmatx->control) |
^
In function 'axiemac_send': drivers/net/xilinx_axi_emac.c:501:21:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
while (timeout && (!in_be32(&priv->dmatx->status) &
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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During the initialization of PHY the gigabit bit capable is set if the
controller is a GEM. However, for sama5d2 and sama5d4, the GEM is
configured to support only 10/100.
Improperly setting the GBE capability leads to an unresponsive MAC
controller. This patch fixes this behavior allowing using the gmac with
these SoCs.
Suggested-by: Nicolas Ferre <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
Acked-by: Nicolas Ferre <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <[email protected]>
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Current code compares the return pointer of function
qbman_cena_write_start with NULL. Instead the value of the return
pointer should be compared.
Signed-off-by: Pratiyush Mohan Srivastava <[email protected]>
Acked-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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When building katmai, it reports quite a lot
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Fix this by casting the dev->iobase with u_long.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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BUILD_BUG_* macros have been defined in several headers. It would
be nice to collect them in include/linux/bug.h like Linux.
This commit is cherry-picking useful macros from include/linux/bug.h
of Linux 4.4.
I did not import BUILD_BUG_ON_MSG() because it would not work if it
is used with include/common.h in U-Boot. I'd like to postpone it
until the root cause (the "error()" macro in include/common.h causes
the name conflict with "__attribute__((error()))") is fixed.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <[email protected]>
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pci_virt_to_mem() uses virt_to_phys() to get the physical address.
But pci_virt_to_mem() is also called with uncached addresses which
is wrong according to the documentation of virt_to_phys().
Refactor the PCI_TO_MEM() macro to optionally map an uncached address
back to a cached one before calling pci_virt_to_mem().
Currently pcnet works because virt_to_phys() is incorrectly implemented
on MIPS. With the upcoming asm header file update for MIPS, the
virt_to_phys() implementation will be fixed. Thus this patch is needed
to keep pcnet working on MIPS Malta board.
Signed-off-by: Daniel Schwierzeck <[email protected]>
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With format-security errors turned on, GCC picks up the use of sprintf with
a format parameter not being a string literal.
Simple uses of sprintf are also converted to use strcpy.
Signed-off-by: Ben Whitten <[email protected]>
Acked-by: Wolfgang Denk <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Conflicts:
arch/arm/Kconfig
Signed-off-by: Tom Rini <[email protected]>
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Update this driver to support driver model. As all MVEBU boards using
this driver are converted with this patch, the non-driver-model code
can be removed completely. This is also the reason why this patch
is quite big and includes a) the driver change and b) the
platform change. As its not git-bisect save otherwise.
With this conversion, some parameters are now extracted from the
DT instread of using the config header defines. The supported
properties right now are:
PHY-mode ("phy-mode") and PHY-address ("reg").
The base addresses for the ethernet controllers can be removed from
the header files as well.
Please note that this patch also removes the E1000 network driver
from some MVEBU config headers. This is necessary, as with DM_ETH
configured and the e1000 driver enabled, the PCI driver also needs
to support DM. But the MVEBU PCI(e) driver still needs to get
ported to DM. When this is done, the E1000 driver can be enabled
again.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Luka Perkov <[email protected]>
Cc: Dirk Eibach <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Simon Glass <[email protected]>
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The change fixes PHY write operation, which incorrectly waits for
released busy state before issuing a write operation, this breaks
sequential write/read operation logic, because read operation
starts immediately on request and it completes, when busy state is
gone.
Instead of adding the second preceding busy state check to read
function, do busy state release check after issuing a write operation,
this method of operation is also recommended by the LPC32xx User's
Manual, see MII Mgmt Indicators Register notes:
For PHY Write if scan is not used:
1. Write 0 to MCMD
2. Write PHY address and register address to MADR
3. Write data to MWTD
4. Wait for busy bit to be cleared in MIND
Reported-by: Alexandre Messier <[email protected]>
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Tested-by: Alexandre Messier <[email protected]>
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This will allow the implementation to make use of data in the block_dev
structure beyond the base device number. This will be useful so that eMMC
block devices can encompass the HW partition ID rather than treating this
out-of-band. Equally, the existence of the priv field is crying out for
this patch to exist.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Update this driver to use the proper driver-model PCI API functions.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Introduced in 45b4773 (net/arp: account for ARP delay, avoid duplicate packets on timeout)
Check the arp timeout and adjust the timeout start time before the call
to eth_recv() so that the sandbox driver has the opportunity to adjust
the sandbox timer after the new start time has been recorded.
Also, change the adjustment amount by 11 seconds instead of exactly the
10 seconds that the ping timout is expecting since the timeout check is
looking for the time elapsed to be greater than but not equal to the
specified delay.
Signed-off-by: Joe Hershberger <[email protected]>
Reviewed-by: Stefan Brüns <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Commit 08ad9b068afb88 (" ar8031: modify the config func of ar8031 to
ar8021_config") selected 'ar8021_config' as the configuration function
for AR8031.
The correct would be to use 'ar8035_config' instead as AR8031/AR8035
have the same programming model and even share the same phy driver
in the linux kernel: drivers/net/phy/at803x.c.
Tested on a mx6qsabresd and wandboard, which now can work without
any PHY setup code in the board files.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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