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Signed-off-by: Stefano Babic <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
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detected
The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:
list_for_each(entry, &phy_drivers) {
drv = list_entry(entry, struct phy_driver, list);
if ((drv->uid & drv->mask) == (phy_id & drv->mask))
return drv;
}
This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.
For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.
This patch fixes this issue.
Signed-off-by: Bhupesh Sharma <[email protected]>
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This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.
Signed-off-by: Arpit Goel <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
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R8A7790 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7790.
Signed-off-by: Hisashi Nakamura <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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The sh-eth of rmobile needs to use invalidate_cache* function.
This patch adds invalidate_cache* function.
Signed-off-by: Hisashi Nakamura <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Patch: 268948
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sh-eth can change the alignment size of a packet descriptor according to BUS
size. This patch adds this function.
Signed-off-by: Hisashi Nakamura <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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The cache API of SH was changed from dcache_wback_range to flush_dcache_range.
sh-eth uses dcache_wback_range. This patch changes to flush_dcache_range.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Avoid a recently introduced unused variable warning for boards that
use mvgbe but not phylib.
Signed-off-by: Sascha Silbe <[email protected]>
Patch: 266334
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As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the
common driver. Currently AR8031_driver didn't work for AR8033,
hence updated it to have it work on AR8031/AR8033.
Signed-off-by: Shengzhou Liu <[email protected]>
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The fec_halt() never free'd both RX and TX DMA descriptors that
were allocated in fec_init(), nor did it free the RX buffers.
Rework the FEC driver so that these descriptors and buffers are
allocated only once in fec_probe().
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
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CONFIG_IXP4XX_NPE is defined only for CPU ixp.
It is not necessary to filter by CPU ixp.
Signed-off-by: Masahiro Yamada <[email protected]>
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CONFIG_FMAN_ENET is defined only for CPU mpc85xx.
We do not need to filter by CPU mpc85xx.
Signed-off-by: Masahiro Yamada <[email protected]>
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Signed-off-by: Andreas Bießmann <[email protected]>
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T1040 Soc has four personalities:
-T1040 (4 cores with L2 switch)
-T1042:Reduced personality of T1040 without L2 switch
-T1020:Reduced personality of T1040 with less cores(2 cores)
-T1022:Reduced personality of T1040 with 2 cores and without L2 switch
Update defines in arch/powerpc header files, Makefiles and in
driver/net/fm/Makefile to support all T1040 personalities
Signed-off-by: Poonam Aggrwal <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
[York Sun: fixed Makefiles]
Acked-by: York Sun <[email protected]>
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The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade. It is now
causing build issues. Instead of wasting time on things nobody is
interested in any more, we rather drop this board.
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
cc: Tom Rini <[email protected]>
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tricorder/Makefile
board/ppcag/bg0900/Makefile
drivers/bootcount/Makefile
include/configs/omap4_common.h
include/configs/pdnb3.h
Makefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:
board/compulab/common/Makefile
board/udoo/Makefile
include/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.
include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.
Note: 'git show' will also list two files just because
they are new:
include/configs/am335x_igep0033.h
include/configs/omap3_igep00x0.h
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On relatively slow boards (such as the MIPS Malta with an FPGA core
card) it can be extremely common for transmits to underflow - to the
point where it appears they simply do not work at all. Setting the
NOUFLO bit causes the ethernet controller to not begin transmission on
the wire until a transmit start point is reached. Setting that transmit
start point to the full packet will cause the controller to only
transmit the packet once it has buffered it entirely thus preventing any
transmit underflows from occuring and allowing the controller to
function on slower boards.
Signed-off-by: Paul Burton <[email protected]>
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Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data from being transmitted or received, and prevents the driver
from getting stuck waiting for the ethernet controller to update
descriptors when in reality it has but the old values are being read
from cache.
Signed-off-by: Paul Burton <[email protected]>
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This should cause no change to the generated code, but is semantically
correct.
Signed-off-by: Paul Burton <[email protected]>
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Fix up the code to match Documentation/CodingStyle. This is mostly
removing extraneous spaces.
No functional change is intended.
Signed-off-by: Paul Burton <[email protected]>
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Netconsole loses the second character when used as input by
either setenv stdin nc or setenv stdin serial,nc if using CONSOLE_CONSOLE_MUX
Before a nc_send_packet() to echo the input, a check is done to see if
nc_ether is valid. If its not, it waits for an arp request and then sends
the packet (which contains the first character of line to be displayed as
output). As part of reaping the arp request, the second character is consumed.
We protect this by making the call to NetLoop(NETCONS) between
input_recursion.
Signed-off-by: Suriyan Ramasami <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Signed-off-by: Masahiro Yamada <[email protected]>
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Get DMA bus width from design config register
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Signed-off-by: Masahiro Yamada <[email protected]>
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This can be useful if one wants to disable an interface in u-boot
because u-boot should not manage it but then later reenable it for FDT
fixing or if the kernel uses this interface.
Signed-off-by: Valentin Longchamp <[email protected]>
[York Sun: fix conflict in fm_eth.h]
Acked-by: York Sun <[email protected]>
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T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with [email protected] per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <[email protected]>
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Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.
QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
1. Confirm whether QSGMII Riser Card is used.
2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.
However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.
Signed-off-by: Zhao Qiang <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
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if phy_connect() did not find a phy, phydev is NULL and
following code in cpsw_phy_init() crashes. Fix this.
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Mugunthan V N <[email protected]>
Cc: Tom Rini <[email protected]>
Acked-by: Mugunthan V N <[email protected]>
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Performing tftp transfers on mx28 results in random timeouts.
Hector Palacios and Robert Hodaszi analyzed the root cause being related to the
wrong alignment of the 'buff' buffer inside fec_recv().
Benoît Thébaudeau provided an excellent analysis of the alignment bug that is
present on older versions, such as GCC 4.5.4:
http://marc.info/?l=u-boot&m=137942904906131&w=2
Use ALLOC_CACHE_ALIGN_BUFFER() to avoid alignment issues from older GCC
versions.
Reported-by: Hector Palacios <[email protected]>
Tested-by: Oliver Metz <[email protected]>
Tested-by: Hector Palacios <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Marek Vasut <[email protected]>
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Similarly as mx25 and mx53, mx6solo-lite needs to setup the MII gasket for RMII
mode.
Add support for mx6solo-lite.
Signed-off-by: Fabio Estevam <[email protected]>
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The SPDX License List version 1.19 now contains an official entry for
the IBM-pibs license. However, instead of our suggestion "ibm-pibs",
the SPDX License List uses "IBM-pibs", with the following rationale:
"The reason being that all other SPDX License List short identifiers
tend towards using capital letters unless spelling a word. I'd prefer
to be consistent to this end".
Change the license IDs to use the official name.
Signed-off-by: Wolfgang Denk <[email protected]>
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Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.
Signed-off-by: Robert P. J. Day <[email protected]>
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Conflicts:
drivers/serial/serial.c
The conflict above was a trivial case of adding one init
function in each branch, and manually resolved in merge.
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fix the following building warning
---8>---
macb.c: In function 'macb_init':
macb.c:400:14: warning: 'phydev' may be used uninitialized in this function
macb.c:377:21: note: 'phydev' was declared here
---<8---
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Without this change, the following message is generated:
Warning: FEC using MAC address from net device
See doc/README.enetaddr for details.
Signed-off-by: Eric Nelson <[email protected]>
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Also some fix for QSGMII.
1. fix QSGMII configure of Serdes2.
2. fix PHY address of QSGMII MAC9 & MAC10 for each FMAN.
3. fix dtb for QSGMII interface.
Signed-off-by: Shaohui Xie <[email protected]>
Acked-by: York Sun <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini Don't remove some copyrights by accident]
Signed-off-by: Tom Rini <[email protected]>
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This commit adapts the files that were derived from PIBS (PowerPC
Initialization and Boot Software) codeto using SPDX License
Identifiers.
So far, SPDX has not assigned an official License ID for the PIBS
license yet, so this should be considered preliminary.
Note that the following files contained incorrect license information:
arch/powerpc/cpu/ppc4xx/4xx_uart.c
arch/powerpc/cpu/ppc4xx/start.S
arch/powerpc/include/asm/ppc440.h
These files included, in addition to the GPL-2.0 / ibm-pibs dual
license as inherited from PIBS, a GPL-2.0+ license header which was
obviously incorrect. This has been removed.
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Stefan Roese <[email protected]>
Signed-off-by: Wolfgang Denk <[email protected]>
Conflicts:
Licenses/README
Acked-by: Stefan Roese <[email protected]>
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1. Reformat tx/rx descriptor as an uniform struct.
2. Replace uint32_t[2] with uint64_t for descriptor control.
Signed-off-by: Kuo-Jung Su <[email protected]>
CC: Joe Hershberger <[email protected]>
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Signed-off-by: Kuo-Jung Su <[email protected]>
CC: Joe Hershberger <[email protected]>
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Signed-off-by: Kuo-Jung Su <[email protected]>
CC: Joe Hershberger <[email protected]>
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This patch adds support for Realtek PHY modules RTL8211DN and
RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG),
which can be found on Freescale's T1040RDB boards.
To make the driver more generic across 8211 family, a generic name 8211x
is added for macros and function names.
Signed-off-by: Bhupesh Sharma <[email protected]>
Acked-by: York Sun <[email protected]>
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Use ARRAY_SIZE instead of having similar implementation in each drivers.
The NUMELEMS defined in drivers/net/npe/include/IxOsalTypes.h is not used
at all, so this patch removes it instead of converting it to use ARRAY_SIZE.
Signed-off-by: Axel Lin <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Mike Frysinger <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: TsiChungLiew <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: York Sun <[email protected]>
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