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Coding style should follow linux coding style.
Signed-off-by: Michal Simek <[email protected]>
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Do not setup additional ENET_MAX_MTU macro.
Signed-off-by: Michal Simek <[email protected]>
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Setup RX/TX ping-pong buffer for every emaclite IP separately.
The next patch move initialization directly to board code.
Signed-off-by: Michal Simek <[email protected]>
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Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be
aligned, so wait for lane alignment before completing the startup sequence.
Note that this process can take up to three seconds.
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the
P3060 and should always be set to zero.
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Function dtsec_configure_serdes() needs to know where the TBI PHY registers
are in order to configure SGMII for proper SerDes operation.
During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs'
when it called init_dtsec(), because it was believed that phyregs was not
used. In fact, it is used by dtsec_configure_serdes() to configure the TBI
PHY registers.
We also need to define the PHY registers in struct fm_mdio.
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The Teranetics PHY does not properly report the link state
for fiber connections. The new PHY code actually checked the link,
and so the FM driver would refuse to talk over a linkless PHY.
But the link may actually be up, so now we always report it as up
for fiber connections on the tn2020.
Signed-off-by: Andy Fleming <[email protected]>
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Fix:
smc91111.c: In function 'smc_phy_configure':
smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable]
smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <[email protected]>
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Esp. while printing the environment the output is usually longer than 512
bytes. Instead of cutting the message, send multiple 512 bytes packets.
Signed-off-by: Michael Walle <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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This is long over due. All but two net drivers have been converted, but
those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined. So here we scrub the
core code.
Signed-off-by: Mike Frysinger <[email protected]>
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This driver was never converted to NET_MULTI, and no board uses it.
So punt it and be done.
Signed-off-by: Mike Frysinger <[email protected]>
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These drivers have never been converted to NET_MULTI, and they are only
used by one board (BMW). So drop the drivers until someone feels like
rewriting them for NET_MULTI support.
Rather than punting the BMW board completely, just disable net support
in its board config. Seems to build fine without it.
Signed-off-by: Mike Frysinger <[email protected]>
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* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/p3060: Add SoC related support for P3060 platform
powerpc/85xx: Add support for setting up RAID engine liodns on P5020
powerpc/85xx: Refactor some defines out of corenet_ds.h
fm-eth: Add ability for board code to disable a port
powerpc/mpc8548: Add workaround for erratum NMG_LBC103
powerpc/mpc8548: Add workaround for erratum NMG_DDR120
powerpc/mpc85xxcds: Fix PCI speed
powerpc/mpc8548cds: Fix booting message
powerpc/p4080: Add support for secure boot flow
powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
powerpc/p2041rdb: remove watch dog related codes
powerpc/p2041rdb: updated description of cpld command
powerpc/p2041rdb: add more ddr frequencies support
powerpc/p2041rdb: set sysclk according to status of physical switch SW1
powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
powerpc/mpc8xxx: Add DDR2 to unified DDR driver
powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
powerpc/85xx: Refactor P2041RDB to use common p_corenet files
powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
powerpc/85xx: Enable CMD_REGINFO on corenet boards
powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
powerpc/85xx: Fix USB protocol definitions for P1020RDB
powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
powerpc/mpc8xxx: Move DDR RCW overriding to common code
powerpc/mpc8xxx: Extend CWL table
powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
powerpc/85xx: Cleanup extern in corenet_ds board code
powerpc/p2041rdb: Add ethernet support on P2041RDB board
powerpc/85xx: Add networking support to P1023RDS
powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
powerpc/85xx: Add FMan ethernet support to P4080DS
powerpc/85xx: Add support for FMan ethernet in Independent mode
powerpc/mpc8548cds: Cleanup mpc8548cds.c
powerpc/mp: add support for discontiguous cores
powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
fdt: Add new fdt_create_phandle helper
fdt: Rename fdt_create_phandle to fdt_set_phandle
powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
nand: Freescale Integrated Flash Controller NAND support
powerpc/85xx: Add basic support for P1010RDB
powerpc/85xx: Add support for new P102x/P2020 RDB style boards
powerpc/85xx: relocate CCSR before creating the initial RAM area
powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
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Add P3060 SoC specific information:cores setup, LIODN setup, etc
The P3060 SoC combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and peripheral interfaces.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The SoC configuration may have more ports enabled than a given board
actually can utilize. Add a routinue that allows the board code to
disable a port that it knows isn't being used.
fm_disable_port() needs to be called before cpu_eth_init().
Signed-off-by: Kumar Gala <[email protected]>
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Every emaclite instance use own setting.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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Use dev->iobase instead of baseaddress.
Signed-off-by: Michal Simek <[email protected]>
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Simplify driver logic and clear eth_device structure
in one command.
Signed-off-by: Michal Simek <[email protected]>
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Cleanup structure.
Signed-off-by: Michal Simek <[email protected]>
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Current xilinx emaclite use net multi registration
but doesn't support several emaclites interfaces.
Changing driver name with adding address to name
is the first step how to distiguish several drivers.
Signed-off-by: Michal Simek <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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This patch allows user to register multiple FEC controllers. To preserve
compatibility with older boards, the mxcfec_register() call is still in place.
To use multiple controllers, new macro is in place, the mxcfec_register_multi(),
which takes more arguments. The syntax is:
mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address);
To disable the fecmxc_register() compatibility stuff, define the macro
CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE
and CONFIG_FEC_MXC_PHYADDR.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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The default is MII100, which was hardcoded previously in the driver.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Once the MDIO state machine has been initialized and enabled, it
starts polling all 32 PHY addresses on the MDIO bus, looking for
an active PHY. Add a 5 ms delay, so all PHYs are for sure detected.
This problem was detected on the cmc board with a KSZ8864 switch.
Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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The PHY driver was too verbose and corrupted the boot message display
like this:
...
Net: Ethernet PHY: KSZ8873 @ 0x02
DaVinci-EMAC
...
Turn printf() into debug() so we get the expected output again:
...
Net: DaVinci-EMAC
...
Signed-off-by: Heiko Schocher <[email protected]>
cc: Paulraj Sandeep <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Cc: Paulraj Sandeep <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Mike Frysinger <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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This patch adds support for Fast Ethernet Controller driver for
Armada100 series.
Signed-off-by: Ajay Bhargav <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
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The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block. Normally it is utilized
via Queue Manager (Qman) and Buffer Manager (Bman). However for boot
usage the FMan supports a mode similar to QE or CPM ethernet collers
called Independent mode.
Additionally the FMan block supports multiple 1g and 10g interfaces as a
single entity in the system rather than each controller being managed
uniquely. This means we have to initialize all of Fman regardless of
the number of interfaces we utilize.
Different SoCs support different combinations of the number of FMan as
well as the number of 1g & 10g interfaces support per Fman.
We add support for the following SoCs:
* P1023 - 1 Fman, 2x1g
* P4080 - 2 Fman, each Fman has 4x1g and 1x10g
* P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Dai Haruki <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Lei Xu <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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This reverts commit 041c542219af7f31c372d89b4c7c6f4c8064a8ce.
The lines removed by this commit weren't redundant. The logic is (and
probably should be better commented):
Find the intersection of the advertised capabilities of both sides of
the link (lpa).
From that intersection, find the highest capability we can run at
(that will be the negotiated link).
Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL).
The code will now set phydev->speed to 100, and phydev->duplex to 1,
but this link does not support 100FULL.
Kudos to Andy Fleming <[email protected]> for binging this to
attention and for the explanation.
Signed-off-by: Wolfgang Denk <[email protected]>
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Trivial conversion of the ks8695eth driver to a CONFIG_MULTI_ETH type
driver.
Signed-off-by: Greg Ungerer <[email protected]>
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This change slightly improves readability of the phydev speed/duplex
assignment logic.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Acked-by: Detlev Zundel <[email protected]>
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This change allows to cope with a mii bus device registered using
miiphy_register(), which doesn't assign a default reset handler.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Acked-by: Detlev Zundel <[email protected]>
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Commit 6af1d41 "smc911x MII made available" was missing a few "const"
qualifiers. Fix the resulting in build warnings:
smc911x.c: In function 'smc911x_initialize':
smc911x.c:297: warning: passing argument 2 of 'miiphy_register' from incompatible pointer type
smc911x.c:297: warning: passing argument 3 of 'miiphy_register' from incompatible pointer type
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Helmut Raiger <[email protected]>
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The driver already had the MII functions, but they have not been
registered using miiphy_register().
Signed-off-by: Helmut Raiger <[email protected]>
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TX and RX channel numbers programmed as '1' during EMAC
teardown initialization is wrong. This patch fixes the
same by setting channel number to '0' which is used by U-boot.
Signed-off-by: Sugumar Natarajan <[email protected]>
Signed-off-by: Nagabhushana Netagunte <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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The PHY driver was too verbose and corrupted the boot message display
like this:
...
Net: TSEC0 connected to Marvell 88E1111S
TSEC1 connected to Marvell 88E1111S
TSEC0, TSEC1
...
Turn printf() into debug() so we het the expected output again:
...
Net: TSEC0, TSEC1
...
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Kumar Gala <[email protected]>
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Built-in Ethernet adapters support setting the mac address by means of a
ethaddr environment variable for each interface (ethaddr, eth1addr, eth2addr).
This adds similar support to the USB network side, using the names
usbethaddr, usbeth1addr, etc. They are kept separate since we don't want
a USB device taking the MAC address of a built-in device or vice versa.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Eric Bénard <[email protected]>
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* 'master' of git://git.denx.de/u-boot-ppc4xx:
net/4xx: Install interrupt handler after driver registration
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Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address
Signed-off-by: Mike Williams <[email protected]>
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Only install der 4xx-EMAC interrupt handlers *after* the core
network driver is registered.
This problem was noticed on the APM Taishan 440GX board, where
the board hung upon bootup after displaying "Net:".
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Phil Edworthy <[email protected]>
Cc: Ben Warren <[email protected]>
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gen10g_startup() had 2 bugs:
1) It had a boolean logic error in checking the MMD mask, and
always checked all of them.
2) It checked devices which don't actually report link state, which
meant that it would never believe the link was fully up.
Fix the boolean logic, and then mask the MMD mask so only link-reporting
devices are checked.
Signed-off-by: Andy Fleming <[email protected]>
Reported-by: Ed Swarthout <[email protected]>
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