| Age | Commit message (Collapse) | Author |
|---|
|
The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.
For reference, the values are all documented in NV bug 1771116 comment 20.
The Tegra210 value doesn't match the current TRM, but I've filed a bug to
get the TRM fixed. Earlier TRMs don't document the value this register
should contain, but the ASIC team has validated all these values, except
for the Tegra20 value which is simply left unchanged in this patch.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
When multiple PCI cards are present in an ls2080a board, the second
card does not get its msi-map set up properly due to a bug in
computing the bus number.
The bus number returned by PCI_BDF() is not the actual PCI bus
number, but instead represents a global u-boot PCI bus number. A
given bus number is relative to hose->first_busno, so that has to be
subtracted from the PCI device id.
Signed-off-by: Bogdan Purcareata <[email protected]>
Acked-by: Stuart Yoder <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This option is not used by any board. Drop it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Tegra20's PCIe controller has a couple of quirks. There are workarounds in
the driver for these, but they don't work after the DM conversion:
1) The PCI_CLASS value is wrong in HW.
This is worked around in pci_tegra_read_config() by patching up the value
read from that register. Pre-DM, the PCIe core always read this via a
16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used,
so we need to check for offset 0x8 instead. Mask the offset value back to
32-bit alignment to make this work in all cases.
2) Accessing devices other than dev 1 causes a data abort.
Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code
called during enumeration while iterating over a bus. The DM PCIe core
doesn't use this function. Instead, enhance tegra_pcie_conf_address() to
validate the bdf being accessed, and refuse to access invalid devices.
Since pci_skip_dev() isn't used, delete it.
I've also validated that both these WARs are only needed for Tegra20, by
testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in
conditionally.
Fixes: e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI")
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Thierry Reding <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The terminal condition in the area where a PCI device is scanned is wrong,
and 1f.7 isn't scanned.
Signed-off-by: Yoshinori Sato <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.
for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the controller reflecting the
LUT mapping
basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().
Signed-off-by: Stuart Yoder <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.
Signed-off-by: Stuart Yoder <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Each region is displayed in almost the same way. Break out this common code
into its own function.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Stephen Warren <[email protected]>
|
|
Use this new function in places where it simplifies the code.
Signed-off-by: Simon Glass <[email protected]>
|
|
Fix the following compiler warnings when DEBUG is on.
warning: 'bar_res' may be used uninitialized in this function.
drivers/pci/pci_auto.c:101:21:
if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
^
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Building pci_rom.c with my toolchain complains about may be used uninitialized
rom varaible:
---8<---
+drivers/pci/pci_rom.c:269:25: note: 'rom' was declared here
w+drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios':
w+drivers/pci/pci_rom.c:154:14: warning: 'rom' may be used uninitialized in this function [-Wmaybe-uninitialized]
--->8---
Fix this as done in 55616b86c745fcac5a791268ab8e7cba36965c0f the ram variable.
Signed-off-by: Andreas Bießmann <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
|
|
|
|
With CONFIG_DM_PCI enabled, PCI buses are not enumerated at boot, as they
are without that config option enabled. No command exists to enumerate the
PCI buses. Hence, unless some board-specific code causes PCI enumeration,
PCI-based Ethernet devices are not detected, and network access is not
available.
This patch implements "pci enum" in the CONFIG_DM_PCI case, thus giving a
mechanism whereby PCI can be enumerated.
do_pci()'s handling of case 'e' is moved into a single location before the
dev variable is assigned, in order to skip calculation of dev. The enum
sub-command doesn't need the dev value, and skipping its calculation
avoids an irrelevant error being printed.
Using a command to initialize PCI like this has a disadvantage relative to
enumerating PCI at boot. In particular, Ethernet devices are not probed
during PCI enumeration, but only when used. This defers setting variables
such as ethact, ethaddr, etc. until the first network-related command is
executed. Hopefully this will not cause further issues. Perhaps in the
long term, we need a "net start/enum" command too?
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
|
|
This function can fail, so be sure to report any errors that occur.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Joe Hershberger <[email protected]>
|
|
At present this BIOS emulator uses a bus/device/function number. Change
it to use a device if CONFIG_DM_PCI is enabled.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
This function is only available for compatibility with old code. Avoid
using it in the uclass.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
This function should not be used by driver-model code, so move it to the
compatibility portion.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
With gcc-5.x we get:
drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios':
drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in
this function [-Wmaybe-uninitialized]
While unconvinced that this can happen in practice (if we malloc we set
alloced to true, it will be false otherwise), silence the compiler.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Adjust pci_rom_load() to return an indication of whether it allocated
memory or not. Adjust the caller to free it. This fixes a memory leak
when PCI_VGA_RAM_IMAGE_START is not used.
Reported-by: Coverity (CID: 134194)
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
For this class it is intended to set up the PCI device, so add a comment to
indicate this. This avoids a coverity warning.
Reported-by: Coverity (CID: 134194)
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Armada XP has support for X4 lanes, boards specify this in their
serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration
is stored in GEN_PURP_RES_2_REG.
When enumerating PEX, subsequent interfaces of an X4 lane must be
skipped. Otherwise the enumeration hangs up the board.
The way this is implemented here is not exactly beautiful, but it mimics
how Marvell's BSP does it. Alternatively we could get the information
using board_serdes_cfg_get(), but that won't lead to clean code, either.
Signed-off-by: Phil Sutter <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
The debug printing references bar_res, which exists only if
CONFIG_PCI_ENUM_ONLY is not defined. Therefore move it into the ifdef'd
area.
Signed-off-by: Phil Sutter <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
The current comments are confusing. We don't actually bind a generic device
when the device tree has no information. We try to scan available PCI
drivers. Update the comments to reflect this.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
We should use the new address mapping functions unless we are in
compatibility mode. Disable the old functions by default.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
At present the PCI address map functions use the old API. Add new functions
for this so that drivers can be converted.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Move this function into the compatibility file so that it is not available
by default.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Move these functions into the compatibility file so that they are not
available by default.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
This function should take a struct udevice rather than pci_dev_t. Update it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
Adjust these files to use the driver-model PCI API instead of the legacy
functions.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
Add a driver-model function for reading the PCI BAR from a device.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Add a function which scans the driver model device information rather
than scanning the PCI bus again.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
Add a function which scans the driver model device information rather
than scanning the PCI bus again.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correct
API.
Create a new pci_internal.h header to hold functions that are used within
the PCI subsystem, but are not exported to other drivers.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_bus_find_bdf() accordingly.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
We don't want people changing the legacy PCI files while migration is in
progress. Update the file headers to indicate that.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
When trying to access non-existent/unsupported PCI devices in
ls_pcie_read_config(), when ls_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Signed-off-by: Bin Meng <[email protected]>
|
|
When trying to access non-existent/unsupported PCI devices in
imx_pcie_read_config(), when imx_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Reported-by: Fabio Estevam <[email protected]>
Signed-off-by: Bin Meng <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
|
|
These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
|
|
We eventually need to drop the compatibility functions for driver model. As
a first step, create a configuration option to enable them and hide them
when the option is disabled.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Some functions will be used by driver model and legacy PCI code. To avoid
duplication, put these in a separate, shared file.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
This file should not be used with driver model as it has lots of legacy/
compatibility functions. Rename it to make this clear.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Adjust the Tegra PCI driver to support driver model and move all boards over
at the same time. This can make use of some generic driver model code, such
as the range-decoding logic.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Stephen Warren <[email protected]>
|
|
This function looks up the controller and returns a pointer to each region
type.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Stephen Warren <[email protected]>
|
|
A PCI bus may be a bridge device where the controller is the bridge's
parent. Add a function to return the controller device, given a PCI device.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Stephen Warren <[email protected]>
|
|
Provide a few functions to support using 32-bit access to emulate 8- and
16-bit access.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
Tested-by: Stephen Warren <[email protected]>
|
