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Get the device from phy, or pass the phy in.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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No need for indirection here.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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- Add error tracing messages to the generic PHY infrastructure
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Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko <[email protected]>
Cc: Luka Perkov <[email protected]>
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Add an error trace for PHY errors directly in generic phy
functions provided by PHY uclass.
Signed-off-by: Patrick Delaunay <[email protected]>
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- This patch moves sata phy powerup from dedicate phy to compphy
and adds invert option for sata powerup routine.
Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary <[email protected]>
Signed-off-by: Ken Ma <[email protected]>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman <[email protected]>
Tested-by: Igal Liberman <[email protected]>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <[email protected]>
Tested-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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make the shared reg optional when version is v1 for sata
Suggested-by: Chunfeng Yun <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Chunfeng Yun <[email protected]>
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Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data
This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
In sandbox_phy_bind() a check is added to validate driver_data
content.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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add support for PHY_TYPE_SATA to Mediateks TPHY driver
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Chunfeng Yun <[email protected]>
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Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vdd supply. This way the driver doesn't see an error
when disabling an always-on regulator.
This patch is needed since the commit f93fab312615 ("Revert 'power:
regulator: Return success on attempt to disable an always-on regulator'")
and use the API introduced by commit cc4a224af226 ("power: regulator:
Introduce regulator_set_enable_if_allowed api").
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add the Rockchip PCIe PHY driver as part of
Generic PHY framework.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs. Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.
Using property "ti,dis-chg-det-quirk" in the DT usb2-phy node to
enable this workaround for AM654x PG1.0.
Signed-off-by: Bin Liu <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
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- H6 emac support
- USB PHY H6 logic alignment
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H6 SOC needs additional initialization of PHY registers. Corresponding
changes can be found in the kernel patch [1].
Without this changes there is no enumeration of 'musb' gadget.
[1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79
Fixes: 35fa673e0e5f ("sunxi: phy: Add USB PHY support for Allwinner H6")
Signed-off-by: Roman Stratiienko <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add USB TYPEC PHY driver for rockchip platform.
Referenced from Linux TypeC PHY driver, currently
supporting usb3-port and dp-port need to add it
in the future.
Signed-off-by: Frank Wang <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add Rockchip USB2PHY driver with initial support.
This will help to use it for EHCI controller in host
mode, and USB 3.0 controller in otg mode.
More functionality like charge, vbus detection will
add it in future changes.
Signed-off-by: Jagan Teki <[email protected]>
Signed-off-by: Frank Wang <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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It is possible that users of generic_phy_*() APIs may pass a valid
struct phy pointer but phy->dev can be NULL, leading to NULL pointer
deference in phy_dev_ops().
So call generic_phy_valid() to verify that phy and phy->dev are both
valid.
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <[email protected]>
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Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <[email protected]>
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Move this header out of the common header.
Signed-off-by: Simon Glass <[email protected]>
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Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <[email protected]>
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Clients that are requesting some of uclass API's
without a device (with ofnode) usually have _nodev
naming convention.
- clk_get_by_index_nodev
- clk_get_by_name_nodev
- reset_get_by_index_nodev
- gpio_request_by_name_nodev
So, update the same naming convention PHY framework.
This doesn't change the existing functionality.
Cc: Neil Armstrong <[email protected]>
Cc: Tom Rini <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Usually the digital and analog phys use the same reference clock,
but some platforms have two separate reference clocks for each of
them, so add another optional clock to support them.
In order to keep the clock names consistent with PHY IP's, change
the da_ref for analog phy and ref clock for digital phy.
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Weijie Gao <[email protected]>
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The new version removes all shared banks between multi-phys
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Weijie Gao <[email protected]>
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Support USB2 and USB3 PHY with shared banks when support multi-phys
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Weijie Gao <[email protected]>
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This patch adds a "bulk" API to the phy API in order to
get/init/exit/power on/off a group of phys associated
with a device.
The bulk API will avoid adding a copy of the same code to
manage a group of phys in drivers.
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Weijie Gao <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This adds support for the USB PHY found on Amlogic GXBB SoCs.
Signed-off-by: Beniamino Galvani <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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Add set_mode function in the Amlogic GXL PHYs that will be called by
the arch code to switch PHYs from/to gadget mode.
Signed-off-by: Neil Armstrong <[email protected]>
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Add generic_phy_get_by_node() to get a PHY phandle from a node instead
of a udevice.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
[narmstrong: fixed by including ofnode.h in generic-phy.h]
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At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.
Move the compatibility features into a separate header file.
Signed-off-by: Simon Glass <[email protected]>
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At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Anatolij Gustschin <[email protected]>
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- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai)
- Allwinner R40 Ethernet, usb phy enablement (Andre Przywara)
- Sunxi auto load from 128KB MMC offset (Andre Przywara)
- Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
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Since every Allwinner USB PHY seems to be slightly different from each
other, we need to add the compatible string and the respective data
structure to make it work on the R40/V40 SoC.
Nothing spectacular this time, just one less USB controller than the H3.
Copied from the Linux kernel.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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AM654 SoC has USB2 PHY which is similar to existing USB2 PHYs on OMAP
SoCs. Add support for the same.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Below warning is seen when this driver is built for devices with 64 bit
physical address space.
drivers/phy/omap-usb2-phy.c: In function ‘omap_usb2_phy_probe’:
drivers/phy/omap-usb2-phy.c:187:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
priv->phy_base = (void *)base;
^
Fix this by using dev_read_addr_ptr() instead of dev_read_addr().
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.
Signed-off-by: Chunfeng Yun <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Ryder Lee <[email protected]>
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No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.
Signed-off-by: Chunfeng Yun <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Ryder Lee <[email protected]>
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As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence"
in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX.
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <[email protected]>
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For increased DPLL stability use the settings recommended in
the TRM [1] for PHY_RX registers for SATA and USB.
For SATA we need to use spread spectrum settings even
though we don't have spread spectrum enabled. The
suggested non-spread spectrum settings don't work.
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <[email protected]>
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Introduce a mode property in the driver data so that
we don't have to keep using "of_device_is_compatible()"
throughtout the driver.
No functional change.
Signed-off-by: Roger Quadros <[email protected]>
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The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.
Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.
[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf
Signed-off-by: Roger Quadros <[email protected]>
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For some controllers PHYs can be optional. Handling NULL pointers without
crashing nor failing, makes it easy to handle optional PHYs.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
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This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.
Signed-off-by: Weijie Gao <[email protected]>
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There is no proper power domain support for the keystone platforms.
However we need to turn off the USB domains before jumping to linux or it
fail to boot (observed with k2e and k2l platforms).
This can be done in the PHY driver as it is dedicated only to the keystone
platforms and matches the required on/off sequence.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now
we just enable PCIe. As for the other functionalities will be
added gradually in upcoming days.
This is adapted from the Linux version.
Tested-by: Frank Wunderlich <[email protected]>
Signed-off-by: Ryder Lee <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
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Several options are presenting themselves on a various boards
where the options are clearly not used. (ie, SPL/TPL options
when SPL or TPL are not defined)
This patch is not attempting to be a complete list of items, but
more like low hanging fruit. In some instances, I wasn't sure
of DM was required, so I simply made them SPL or TPL.
This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: Adam Ford <[email protected]>
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Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.
SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux clock which
the SERDES uses for Clock Multiplier Unit (CMU refclock).
The PLL mux clock can select from one of the three input
clocks. The right output can select between left input and
external reference clock while the left output can select
between the right input and external reference clock.
The driver has support to select PLL mux and left/right output
mux as specified in device tree.
Signed-off-by: Sekhar Nori <[email protected]>
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In preparation for supporting the musb driver, this patch
adds support for the usb phy associated with the musb driver.
Signed-off-by: Adam Ford <[email protected]>
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The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Corentin Labbe <[email protected]> # Pine-H64
Reviewed-by: Jagan Teki <[email protected]>
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