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To add HDMI support for the RK3399, this commit provides the needed
pinctrl functionality to configure the HDMI I2C pins (used for reading
the screen's EDID).
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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GMAC controller need to init the tx io driver strength to 13mA,
just like the description in dts pinctrl node, or else the controller
may only work in 100MHz Mode, and fail to work at 1000MHz mode.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected] <mailto:[email protected]>>
Reviewed-by: Simon Glass <[email protected]>
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This commit adds support for the pin-configuration of the SPI5
controller of the RK3399 through the following changes:
* grf_rk3399.h: adds definition for configuring the SPI5 pins
in the GPIO2C group
* periph.h: defines PERIPH_ID_SPI3 through PERIPH_ID_SPI5
* pinctrl_rk3399.c: adds the reverse-mapping from the IRQ# to
PERIPH_ID_SPI5; dispatches PERIPH_ID_SPI3
through SPI5 to the appropriate pin-config
function; implements the pin-configuration
for PERIPH_ID_SPI5 using the GPIO2C group
X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: Jakob Unterwurzacher <[email protected]>
Acked-by: Simon Glass <[email protected]>
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This originally started out as
"pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.
However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Simon Glass <[email protected]>
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To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this
point), we need support for additional pin-configuration. This commit
adds the pinctrl support for GMAC in RGMII signalling mode:
* adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID
* adds the required defines (in the GRF support) for configuring the
GPIOC pins for RGMII
* configures the RGMII pins (in GPIOC) when requested via pinctrl
X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Add rk3328 pinctrl driver and grf/iomux structure definition.
Signed-off-by: William Zhang <[email protected]>
Signed-off-by: Kever Yang <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Add a driver which supports pin multiplexing setup for the most commonly
used peripherals.
Signed-off-by: Heiko Stuebner <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Kever Yang <[email protected]>
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Do not use the API which of-platdata not support.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Added rockchip tag:
Signed-off-by: Simon Glass <[email protected]>
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rk3399 grf register bit defenitions should locate in header
file, so that not only pinctrl can use it.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Added rockchip tag:
Signed-off-by: Simon Glass <[email protected]>
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At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: Simon Glass <[email protected]>
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This patch add pinctrl driver for rk3399.
Signed-off-by: Kever Yang <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Bank 0 is the "PMU GPIO" bank which is controlled by the PMU registers
rather than the GRF registers. In the GRF the top half of the register
is used as a mask so that some bits can be updated without affecting the
others, but in the PMU this feature is not provided and the top half of
the register is reserved.
Take the same approach as the Linux driver to update the value via
read-modify-write but setting the mask for only the bits that have
changed. The PMU registers ignore the top 16 bits so this works for
both GRF and PMU iomux registers.
Signed-off-by: John Keeping <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.
Signed-off-by: Simon Glass <[email protected]>
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This new function is more convenient for callers, and handles pre-relocation
situations automatically.
Signed-off-by: Simon Glass <[email protected]>
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Having some sort of ordering proofed helpful in a lot of other places
already. So for a larger number of rockchip socs it might be helpful
as well instead of an ever increasing unsorted list.
Signed-off-by: Heiko Stuebner <[email protected]>
Reviewed-by: Andreas Färber <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Rockchip socs are always named rkxxxx in all places, as also shown
by the naming of the rk3036 pinctrl file itself.
Therefore also name the config symbol according to this scheme.
Signed-off-by: Heiko Stuebner <[email protected]>
Acked-by: Simon Glass <[email protected]>
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The rk3288 pinctrl is very specific to this soc, so should
not hog the generic rockchip naming.
Signed-off-by: Heiko Stuebner <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Add support for of-platdata with rk3288. This requires disabling access to
the device tree and renaming the driver to match the string that of-platdata
will search for.
Signed-off-by: Simon Glass <[email protected]>
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The rgmii_pins node in rk3288.dtsi configures 15 pins. Increase the size
of the cell array to accomedate that, otherwise only the first 10 get
configured.
Signed-off-by: Sjoerd Simons <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Since the device tree does not specify the EDID pinctrl option for HDMI we
must set it manually. Fix the driver to handle this.
Signed-off-by: Simon Glass <[email protected]>
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Implement this so that the GPIO command will be able to report whether a
GPIO is used for input or output.
Signed-off-by: Simon Glass <[email protected]>
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This file has many features that are not needed by SPL. Use #ifdef to
remove the unused features and reduce the code size.
Signed-off-by: Simon Glass <[email protected]>
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We can make use of the device tree to configure pinctrl settings. Add this
support for the driver so we can use it in U-Boot proper.
Signed-off-by: Simon Glass <[email protected]>
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This is easier to deal with when using generic code since it allows us to
use a register index instead of naming each register.
Adjust it, adding an enum to improve readability.
Signed-off-by: Simon Glass <[email protected]>
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Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding.
Signed-off-by: Jeffy Chen <[email protected]>
Acked-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Commit c5acf4a2b3c6 ("pinctrl: Add the concept of peripheral IDs")
added some additional change that was not mentioned in the git-log.
That commit added dm_scan_fdt_node() in the pinctrl uclass binding.
It should be handled by the simple-bus driver or the low-level
driver, not by the pinctrl framework.
I guess Simon's motivation was to bind GPIO banks located under the
Rockchip pinctrl device. It is true some chips have sub-devices
under their pinctrl devices, but it is basically SoC-specific matter.
This commit partly reverts commit c5acf4a2b3c6 to keep the only
pinctrl-generic features in the uclass. The dm_scan_fdt_node()
should be called from the rk3288_pinctrl driver.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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Add a driver which supports pin multiplexing setup for the most commonly
used peripherals.
Signed-off-by: Simon Glass <[email protected]>
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