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As exposed by "make randconfig", we have an issue with the dependencies
for PINCTRL_TH1520. It really needs to depend on PINCTRL_GENERIC rather
than select it, and PINCTRL_GENERIC in turn already depends on
PINCTRL_FULL.
Signed-off-by: Tom Rini <[email protected]>
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Commit f4df9f53b7a9 ("pinctrl: mediatek: Bind gpio while binding pinctrl")
refactored pinctrl-mtk-common.c and the SoC-specific drivers to register
the gpiochip during the bind phase instead of probe. As part of this
change, each SoC driver must implement a bind callback.
The drivers recently added for mt8188, mt8189, mt8195 and mt8365 do not
define this callback, which prevents the gpiochip from being registered
properly.
Add the missing bind callback to these drivers.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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This driver adds the base support of pinctrl over SCMI. The driver
does two main things. First, it allows you to configure the initial
pin states. Secondly, it's used a base to build a GPIO driver on
top of it.
To configure the states then add a pinmux config to the scmi_pinctrl
section:
scmi_pinctrl: protocol@19 {
reg = <0x19>;
pinmux1: pinmux_test {
pinmux = <0 1 0xFFFFFFFF 18 1
0 2 0xFFFFFFFF 18 1
0 3 0xFFFFFFFF 18 1>;
function = "f_gpio1";
groups = "grp_1", "grp_3";
};
};
Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing. However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server. The
numbers are: selector, identifier, function_id, config_type, and
config_value. In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.
Signed-off-by: Dan Carpenter <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add all the pinctrl message IDs. I renamed SCMI_MSG_PINCTRL_CONFIG_SET
to SCMI_PINCTRL_SETTINGS_CONFIGURE so the naming matches the spec better.
Signed-off-by: Dan Carpenter <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Multiple pads can drive the same module input pin, and a daisy chain
register is used to select the active input path. This patch defines
DAISY_OFFSET_IMX952 (0x460) and allows binding on i.MX952.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
A fix:
* Fixing compiling MT8195 due to some independent changes that were applied
around the same time as MT8195 support was merged. (CI would not have caught
this since we didn't have a defconfig until now).
And few small features:
* New defconfig for MT8395/Genio 1200 EVK.
* pinctrl support for MT8189-compatible SoCs.
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Add pinctrl support for mt8189.
Signed-off-by: Bo-Chen Chen <[email protected]>
Co-developed-by: David Lechner <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Increase the maximum number of base addresses that can be handled by the
mediatek pinctrl driver from 10 to 15. This is needed for the MT8189
which has 15 base addresses.
Reviewed-by: Macpaul Lin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Add a bounds check on the number of base addresses to prevent
out-of-bounds access to the priv->base array.
Reviewed-by: Macpaul Lin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/29452
- New SoC support: RK3506, RK3582;
- New Board support: RK3528 FriendlyElec NanoPi Zero2;
- Other fixes
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Add pinctrl driver for RK3506.
Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with adjustments
to use regmap_update_bits().
Signed-off-by: Ye Zhang <[email protected]>
Signed-off-by: Jonas Karlman <[email protected]>
Tested-by: Aaron Griffith <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Use syscon_regmap_lookup_by_phandle() to simplify the code.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
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Prepare v2026.04-rc4
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After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.
Signed-off-by: Philip Molloy <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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The i.MX9 pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX9[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.
Signed-off-by: Peng Fan <[email protected]>
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Add support for printing pin names and current mux configuration on i.MX91
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX91
pads.
Signed-off-by: Peng Fan <[email protected]>
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Add support for printing pin names and current mux configuration on
i.MX93 when CMD_PINMUX is enabled.
- A full pin descriptor table for i.MX93 pads.
- Implementation of get_pins_count(), get_pin_name(), and
get_pin_muxing() in the i.MX9 pinctrl driver.
There is no good way to add real mux names, so just dump the function ID
from the mux register.
Signed-off-by: Peng Fan <[email protected]>
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We are going to add pinctrl data support for both i.MX93 and i.MX91.
Since these SoCs share the same pinctrl driver structure, rename
pinctrl-imx93.c to a more generic pinctrl-imx9.c and update all related
variable and function names accordingly.
This prepares the driver for supporting additional i.MX9 family SoCs.
Signed-off-by: Peng Fan <[email protected]>
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The i.MX8M pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX8M[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.
Signed-off-by: Peng Fan <[email protected]>
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Add support for printing pin names and current mux configuration on i.MX8MQ
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MQ
pads.
Signed-off-by: Peng Fan <[email protected]>
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Add support for printing pin names and current mux configuration on i.MX8MM
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MM
pads.
Signed-off-by: Peng Fan <[email protected]>
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Add support for printing pin names and current mux configuration on i.MX8MN
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MN
pads.
Signed-off-by: Peng Fan <[email protected]>
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Add support for printing pin names and current mux configuration on
i.MX8MP when CMD_PINMUX is enabled.
- imx_pinctrl_pin_desc structure and PINCTRL_PIN()/IMX_PINCTRL_PIN()
helpers for defining pin descriptors.
- A full pin descriptor table for i.MX8MP pads.
- Implementation of get_pins_count(), get_pin_name(), and
get_pin_muxing() in the i.MX8M pinctrl driver.
There is no good way to add real mux names, so just dump the function ID
from the mux register.
Signed-off-by: Peng Fan <[email protected]>
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PINCTRL_IMX93 is for i.MX9[3,1], not for i.MX8M, correct the typo.
Signed-off-by: Peng Fan <[email protected]>
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The hardware denies any access from the U-Boot non-secure world to the
secure-protected pins. Hence, prevent any driver to configure such a pin.
Identify the secure pins with "NO ACCESS" through the 'pinmux status -a'
command.
Use a driver data structure to identify which hardware versions support
this feature.
Signed-off-by: Fabien Dessenne <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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The MT798x series SoCs have IES regiter definitions. They should
belong to the pinctrl v1 revision.
Signed-off-by: Shiji Yang <[email protected]>
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Add support for MT8195 pinctrl. The driver is based on the kernel one.
Signed-off-by: Chris-QJ Chen <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
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Peng Fan (OSS) <[email protected]> says:
This patch set primarily removes unused DECLARE_GLOBAL_DATA_PTR
instances.
Many files declare DECLARE_GLOBAL_DATA_PTR and include
asm/global_data.h even though gd is never used. In these cases,
asm/global_data.h is effectively treated as a proxy header, which is
not a good practice.
Following the Include What You Use principle, files should include
only the headers they actually depend on, rather than relying on
global_data.h indirectly. This approach is also adopted in Linux kernel
[1].
The first few patches are prepartion to avoid building break after
remove the including of global_data.h.
A script is for filtering the files:
list=`find . -name "*.[ch]"`
for source in ${list}
do
result=`sed -n '/DECLARE_GLOBAL_DATA_PTR/p' ${source}`
if [ "${result}" == "DECLARE_GLOBAL_DATA_PTR;" ]; then
echo "Found in ${source}"
result=`sed -n '/\<gd\>/p' ${source}`
result2=`sed -n '/\<gd_/p' ${source}`
result3=`sed -n '/\<gd->/p' ${source}`
if [ "${result}" == "" ] && [ "${result2}" == "" ] && [ "${result3}" == "" ];then
echo "Cleanup ${source}"
sed -i '/DECLARE_GLOBAL_DATA_PTR/{N;/\n[[:space:]]*$/d;s/.*\n//;}' ${source}
sed -i '/DECLARE_GLOBAL_DATA_PTR/d' ${source}
sed -i '/global_data.h/d' ${source}
git add ${source}
fi
fi
done
[1] https://lpc.events/event/17/contributions/1620/attachments/1228/2520/Linux%20Kernel%20Header%20Optimization.pdf
CI: https://github.com/u-boot/u-boot/pull/865
Link: https://lore.kernel.org/r/[email protected]
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Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.
Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.
Reviewed-by: Patrice Chotard <[email protected]> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <[email protected]> #TI boards
Acked-by: Yao Zi <[email protected]> #TH1520
Signed-off-by: Peng Fan <[email protected]>
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Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like
display-port {
mux {
groups = "dpaux0_1";
function = "dpaux0";
};
};
can be replaced by
display-port {
mux {
pins = "MIO34", "MIO35", "MIO36", "MIO37";
function = "dpaux0";
};
};
While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.
Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.
Signed-off-by: Sean Anderson <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add pinmux_property_set ops for mediatek pinctrl framework
Signed-off-by: Julien Masson <[email protected]>
Signed-off-by: Vitor Sato Eschholz <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Tested-by: David Lechner <[email protected]>
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Add pinctrl driver for mt8188. The driver is based on the kernel driver.
Signed-off-by: Chris-QJ Chen <[email protected]>
Signed-off-by: Jill.Wu <[email protected]>
Signed-off-by: Vitor Sato Eschholz <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
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Add pull-up/pull-down (PUPD) register definitions for mt8365.
Signed-off-by: David Lechner <[email protected]>
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Replace uclass_get_device_by_ofnode() with syscon_regmap_lookup_by_phandle()
to get the "mediatek,pctl-regmap" syscon device.
Depending on probe order, uclass_get_device_by_ofnode() may fail, but
syscon_regmap_lookup_by_phandle() has logic in it to handle that case
correctly.
The previous implementation could read more than one syscon if the
"mediatek,pctl-regmap" property had more than one phandle, but the one
board with a devicetree that does that is not supported in U-Boot yet,
so we can save that for later (it may never be needed).
Fixes: 424ceba18bfb ("pinctrl: mediatek: support mediatek,pctl-regmap property")
Signed-off-by: David Lechner <[email protected]>
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Ignore the error return value from mtk_pinconf_bias_set_pupd_r1_r0().
The PUPD/R1/R0 registers only include a small subset of the pins, so
it is normal for this function to return an error for most pins.
Therefore, this error should not be propagated.
This fixes not all pins in a pinmux group being configured in some
cases because the propagated error caused the configuration loop to
exit early.
The rest of the function is refactored to return early on errors to
improve readability.
Signed-off-by: David Lechner <[email protected]>
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Set the size of the reg_cals arrays to PINCTRL_PIN_REG_MAX to in all
affected mediatek pinctrl drivers. This is needed to avoid potential
out-of-bounds accesses when they is used in mtk_hw_pin_field_get().
All array members need to be initialized since the code loops from 0
to PINCTRL_PIN_REG_MAX - 1. mt7622_reg_cals was already defined this
way, but the others were not.
Signed-off-by: David Lechner <[email protected]>
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Introduce a new Kconfig option PINCTRL_QCOM_GENERIC that, when selected,
enables all Qualcomm pinctrl drivers by default. This simplifies defconfigs
for platforms supporting multiple SoCs and avoids manual driver selection.
Individual drivers can still be disabled if required.
Signed-off-by: Aswin Murugan <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Add pinctrl driver for QCS615. Driver code is based on the
similar U-Boot and Linux drivers.
Signed-off-by: Aswin Murugan <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Ported from the Mediatek SDK. The upstream Linux kernel also has the
same register map as the SDK.
Signed-off-by: Shiji Yang <[email protected]>
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David Lechner <[email protected]> says:
MT8365 has different pinctrl register layout compared to other SoCs in
the family, so needs its own driver.
This is also the first SoC in this family supported in U-Boot using an
upstream devicetree that has the mediatek,pctl-regmap property, so we
need to add support for that to the common mediatek pinctrl code first.
Link: https://lore.kernel.org/r/[email protected]
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Add pinctrl support for MT8365 SoC.
Signed-off-by: Julien Masson <[email protected]>
Signed-off-by: Vitor Sato Eschholz <[email protected]>
Signed-off-by: David Lechner <[email protected]>
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Add support for the mediatek,pctl-regmap devicetree property to the
common MediaTek pinctrl driver.
In upstream devicetrees from Linux, the pinctrl nodes may be on the
interrupt controller register address space rather than the pinctrl
register address space. In this case, there is a syscon node linking to
the actual pinctrl registers. This uses a common property name of
mediatek,pctl-regmap for the phandle to the syscon node.
The logic here is that if this property is present, we look up the
syscon node and use it's address as the base address of the pinctrl
registers and ignore the pinctrl node's own reg property. (Support
for interrupts could be added later if needed.)
There is also at least one SoC in Linux that has two syscon phandles
in this property. This implementation support parsing this, but doesn't
do anything with the second syscon yet (the 2nd syscon is for interrupts
which we are saving for later).
Signed-off-by: David Lechner <[email protected]>
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Tom Rini <[email protected]> says:
As seen by a number of patches fixing memory leaks, U-Boot has a problem
with developer expectations around devm_kmalloc and friends. Namely,
whereas in Linux these memory allocations will be freed automatically in
most cases, in U-Boot this is only true if DEVRES is enabled. Now,
intentionally, in xPL phases, we do not (and do not offer as an option)
enabling DEVRES. However in full U-Boot this is left either to the user,
or some drivers have select'd DEVRES on their own. This inconsistency is
a problem. This series goes and deals with two small issues that were
shown by having all drivers that use devm_.alloc to allocate memory also
select DEVRES and then we make DEVRES no longer be a prompted option and
instead select'd as needed. We do not make this unconditional as it
would result in growing the resulting binary on the many platforms which
have no users of the devm_.alloc family of functions.
Link: https://lore.kernel.org/r/[email protected]
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The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c8c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).
This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.
Reviewed-by: Michael Trimarchi <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Jim Liu <[email protected]> says:
Modify npcm7xx/8xx features and bug fixes.
Link: https://lore.kernel.org/r/[email protected]
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Fix typos in the pin name of GPIO191 and GPIO192
Signed-off-by: Stanley Chu <[email protected]>
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smb11ddcm: connect SMB11 to external DDC pins
smb11ddcs: connect SMB11 to internal GFXDDC
Signed-off-by: Stanley Chu <[email protected]>
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If func->pins could not be allocated, one must also free
func variable that was allocated previously.
Signed-off-by: Francois Berder <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
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- Assorted updates
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This patch adds support for configuring GPIO pull-up and pull-down
resistors in the BCM283x pinctrl driver. It implements the brcm,pull
device tree property to control pin bias settings.
The implementation follows the hardware-specific pull control
mechanisms:
- BCM2835: two-step GPPUD register sequence
- BCM2711: direct per-pin control registers
This enables device tree configurations to specify pull-up, pull-down,
or no bias for individual GPIO pins.
Tested on Raspberry Pi boards with both BCM2835 and BCM2711 SoCs.
Signed-off-by: Cibil Pankiras <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
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