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We have two functions which do the same thing. Standardise on
dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in
normal operation: it is either null or missing.
Also move the functions into one place.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
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We use 'ofnode' rather than 'of_node' in U-Boot. Rename this function to
fit.
Signed-off-by: Simon Glass <[email protected]>
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With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <[email protected]>
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These errors are only really for development purposes. Drop them to reduce
the size of TPL. The error numbers are still reported.
This reduces the TPL binary size on coral by about 160 bytes.
Signed-off-by: Simon Glass <[email protected]>
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Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.
This reduces the TPL binary size by about 608 bytes.
Signed-off-by: Simon Glass <[email protected]>
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This is not used with of-platdata, so remove it in that case.
Signed-off-by: Simon Glass <[email protected]>
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Most drivers use these access methods but a few do not. Update them.
In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Andy Shevchenko <[email protected]>
Acked-by: Pratyush Yadav <[email protected]>
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This code was kept around after of-platdata started supporting parent
devices. That feature seems stable now, so let's drop it.
Signed-off-by: Simon Glass <[email protected]>
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Use the dev_seq() sequence number in all cases.
Signed-off-by: Simon Glass <[email protected]>
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This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.
Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <[email protected]>
Reported-by: Otto Meier <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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Try to maintain some consistency between these variables by using _plat as
a suffix for them.
Signed-off-by: Simon Glass <[email protected]>
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This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.
Signed-off-by: Simon Glass <[email protected]>
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Rename this to be consistent with the change from 'platdata'.
Signed-off-by: Simon Glass <[email protected]>
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We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).
Rename some of the latter variables to end with 'plat' for consistency.
Signed-off-by: Simon Glass <[email protected]>
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This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <[email protected]>
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The need for this can be avoided by passing the correct node to the
device_bind() function.
Signed-off-by: Simon Glass <[email protected]>
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This function is not needed since the standard device_bind() can be used
instead.
Signed-off-by: Simon Glass <[email protected]>
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This function is not necessary anymore, since device_bind_ofnode() does
the same thing and works with both flattree and livetree.
Rename it to indicate that it is special.
Signed-off-by: Simon Glass <[email protected]>
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Update Patrick and my email address with the one dedicated to
upstream activities.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Update pin name to avoid duplicated name with SOC GPIO
gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix.
This pin name can be used in pinmux command.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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The device name is used in pinmux command and in log trace
so it is better to use the parent parent name ("stmfx@42" for
example) than a generic name ("pinctrl" or "stmfx-gpio")
to identify the device instance.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Display the bias information for input gpios or AF configuration,
and not only for output pin, as described in Reference manual
(Table 81. Port bit configuration table).
Fixes: da7a0bb1f279 ("pinctrl: stm32: add information on pin configuration")
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Drop unused members from struct sh_pfc_pinctrl.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
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This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled
Based on the similar patch on Linux.
Signed-off-by: Biju Das <[email protected]>
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This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.
Based on the simialr patch on Linux.
Signed-off-by: Biju Das <[email protected]>
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This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.
Based on the similar patch on Linux.
Signed-off-by: Biju Das <[email protected]>
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Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
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Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
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This renames power domains to match the names on the k210 datasheet.
Signed-off-by: Sean Anderson <[email protected]>
Reported-by: Damien Le Moal <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and
IE_INV set, but I2C cannot have those bits set. This adds a separate
default for SCCB.
Signed-off-by: Sean Anderson <[email protected]>
Reported-by: Damien Le Moal <[email protected]>
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This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:
WARNING: the driver intel_apl_lpc was not found in the driver list
Correct these by using driver names that matches their compatible string.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Sync the R8A77990 SoC PFC tables with Linux 5.9 , commit bbf5c979011a.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
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The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This extends the pinctrl-sandbox driver to support pin muxing, and adds a
test for that behaviour. The test is done in C and not python (like the
existing tests for the pinctrl uclass) because it needs to call
pinctrl_select_state. Another option could be to add a command that
invokes pinctrl_select_state and then test everything in
test/py/tests/test_pinmux.py.
The pinctrl-sandbox driver now mimics the way that many pinmux devices
work. There are two groups of pins which are muxed together, as well as
four pins which are muxed individually. I have tried to test all normal
paths. However, very few error cases are explicitly checked for.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.
Support for the pinmux property is done differently than in Linux. As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.
This commit increases the size of the sandbox build by approximately 48
bytes. However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.
The documentation has been updated from the last Linux commit before it was
split off into yaml files.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
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Bring in the assorted changes that have been staged in the 'next' branch
prior to release.
Signed-off-by: Tom Rini <[email protected]>
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Add the missing GPIOA_18 from the missing EE gpio list.
Signed-off-by: Neil Armstrong <[email protected]>
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The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Mark Kettenis <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next
First set of u-boot-atmel features for 2021.01 cycle:
This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
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https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next
- stm32mp: DT alignment with Linux 5.9-rc4
- stm32mp: convert drivers to APIs which support live DT
- stm32mp: gpio: minor fixes
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Currently, the return value of dev_read_u32_default is stored in an u32,
causing the subsequent "if (function < 0)" to always be false:
u32 function;
...
function = dev_read_u32_default(config, "brcm,function", -1);
if (function < 0) {
debug("Failed reading function for pinconfig %s (%d)\n",
config->name, function);
return -EINVAL;
}
Make "function" variable an int to fix this.
Cc: Matthias Brugger <[email protected]>
Signed-off-by: Ovidiu Panait <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Factor out reading IP base address to ofdata_to_platdata function, which
is designed for this purpose. Also, drop the dev->priv NULL check, since
this is already done by the dm core when allocating space using
priv_auto_alloc_size feature. (in drivers/core/device.c ->
device_ofdata_to_platdata).
Cc: Matthias Brugger <[email protected]>
Signed-off-by: Ovidiu Panait <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Remove CONFIG_IS_ENABLED(OF_CONTROL) check from DM_FLAG_PRE_RELOC, since
this driver only supports OF_CONTROL.
drivers/pinctrl/broadcom/Kconfig:
config PINCTRL_BCM283X
depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL
Cc: Matthias Brugger <[email protected]>
Signed-off-by: Ovidiu Panait <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Cosmetics: Add header with SPDX licence
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same
for PINCTRL_PFC_R8A774A1 help description
Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing
number of the SoC.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
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Add new compatible to microchip,sama7g5 new SoC.
Signed-off-by: Eugen Hristev <[email protected]>
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The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.
Signed-off-by: John Robertson <[email protected]>
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