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Fix a typo in qe_upload_firmware() that prevented uploading firmware on
systems with more than one RISC core.
Signed-off-by: Timur Tabi <[email protected]>
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erratum 5.6 states the autoneg completion bit is functional only if the
autoneg bit is asserted.
This fixes any secondarily-issued networking commands on non-gigabit
links on the mpc8360 mds board.
Signed-off-by: Kim Phillips <[email protected]>
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Move the flat device tree setup for QE related devices into
a common file shared between 83xx & 85xx platforms that have QE's.
Signed-off-by: Kumar Gala <[email protected]>
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PHY less board prints out lots of "read wrong ...":
read wrong value : mii_id 3,mii_reg 2, base e0102320
read wrong value : mii_id 3,mii_reg 3, base e0102320
UEC: PHY is Generic MII (ffffffff)
read wrong value : mii_id 3,mii_reg 4, base e0102320
read wrong value : mii_id 3,mii_reg 0, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
FSL UEC0: Full Duplex
FSL UEC0: Speed 100BT
FSL UEC0: Link is up
Using FSL UEC0 device
Make this printout depend on UEC_VERBOSE_DEBUG and
remove its definition in uec_phy.c
Signed-off-by: Joakim Tjernlund <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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actually polling for PHY autonegotiation to finish enables us to remove the
5 second boot prompt latency present on QE based boards.
call to qe_set_mii_clk_src in init_phy, and mv call to init_phy from
uec_initialize to uec_init by Joakim Tjernlund; autonegotiation wait
code shamelessly stolen from tsec driver.
also rm unused CONFIG_RMII_MODE code.
Signed-off-by: Kim Phillips <[email protected]>
Signed-off-by: Joakim Tjernlund <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This patch extends the number of supported UECs to 4. Note that the
problem of QE thread resources exhaustion is resolved by setting the
correct number of QE threads according to Ethernet type (GBE or FE).
Signed-off-by: David Saada <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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qe.c: In function 'qe_upload_firmware':
qe.c:390: warning: pointer targets in passing argument 2
uec.c: In function 'uec_initialize':
uec.c:1236: warning: 'uec_info' may be used uninitialized
Signed-off-by: Dave Liu <[email protected]>
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Change return values of init() functions in all Ethernet drivers to conform
to the following:
>=0: Success
<0: Failure
All drivers going forward should return 0 on success. Current drivers that
return 1 on success were left as-is to minimize changes.
Signed-off-by: Ben Warren <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Acked-by: Kim Phillips <[email protected]>
Acked-by: Haavard Skinnemoen <[email protected]>
Acked-By: Timur Tabi <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
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Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it. Add function qe_upload_firmware() to parse the blob and
perform the actual upload. Add command-line command "qe fw" to take a firmware
blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware. Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.
Signed-off-by: Timur Tabi <[email protected]>
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Signed-off-by: Joakim Tjernlund <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
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Actually, fixed a large bug in the UEC for *all* platforms.
How did this ever work?
uec_init() did not follow the spec for eth_init(), and returned
0 on success. Switch it to return the link like tsec_init()
(and 0 on error)
The immap for the 8568 was defined based on MPC8568, rather than
CONFIG_MPC8568
CONFIG_QE was off
CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
enabled
Signed-off-by: Andy Fleming <[email protected]>
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Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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According to the latest user manual, the SDMA temporary
buffer base address must be 4KB aligned.
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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The problem is not gcc4 but the code itself. The BD_STATUS() macro can't
be used for busy-waiting since it strips the 'volatile' property from
the bd variable. gcc3 was working by pure luck.
This is a follow on patch to "Fix the UEC driver bug of QE"
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This patch supports DUART, ETH3/4 and PCI etc.
Signed-off-by: Dave Liu <[email protected]>
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The patch prevents the GCC tool chain from striping useful code for
optimization. It will make UEC ethernet driver workable, Otherwise the
UEC will fail in tx when you are using gcc4.x. but the driver can work
when using gcc3.4.3.
CHANGELOG
*Prevent the GCC from striping code for optimization, Otherwise the UEC
will tx failed when you are using gcc4.x.
Signed-off-by: Dave Liu <[email protected]>
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give initial values for reg_num, shift, p_cmxucr in ucc_set_clk_src
since they are passed by reference to ucc_get_cmxucr_reg and assigned.
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this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
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