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2025-03-25riscv: reset: k1: Add reset driverHuan Zhou
Add spacemit reset driver. Signed-off-by: Huan Zhou <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
2025-03-19reset: rzg2l-usbphy-ctrl: Connect up vbus regulatorPaul Barker
Bind the USB VBUS regulator driver under the USB PHY reset driver for the Renesas RZ/G2L and related SoCs. This additional bind is needed as the corresponding device tree node does not contain a compatible string. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Paul Barker <[email protected]>
2025-03-19reset: rzg2l-usbphy-ctrl: Add new driverPaul Barker
Add a new driver to control the USB 2.0 PHY reset controller on the Renesas RZ/G2L and related SoCs. Signed-off-by: Paul Barker <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2024-10-11global: Rename SPL_TPL_ to PHASE_Simon Glass
Use PHASE_ as the symbol to select a particular XPL build. This means that SPL_TPL_ is no-longer set. Update the comment in bootstage to refer to this symbol, instead of SPL_ Signed-off-by: Simon Glass <[email protected]>
2024-10-11drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILDSimon Glass
Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <[email protected]>
2024-07-22drivers: reset: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-07reset: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <[email protected]>
2024-03-24reset: imx: Add support for i.MX8MP reset controllerSumit Garg
Add support for i.MX8MP reset controller, it has same reset IP inside as the other iMX7 and iMX8M variants but with different module layout. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/reset/reset-imx7.c. Use last Linux kernel driver reference commit bad8a8afe19f ("reset: Explicitly include correct DT includes"). Tested-by: Tim Harvey <[email protected]> #imx8mp-venice* Tested-by: Adam Ford <[email protected]> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Sumit Garg <[email protected]>
2024-03-24reset: imx: Refactor driver to simplify function namesSumit Garg
imx7_reset_{deassert/assert}_imx* are a bit more confusing when compared with imx*_reset_{deassert/assert}. So refactor driver to use function names easier to understand. This shouldn't affect the functionality though. Suggested-by: Marek Vasut <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Sumit Garg <[email protected]>
2024-01-24reset: reset-hisilicon: also handle #reset-cells = <2>Yang Xiwen
It's also valid to have #reset-cells = <2> while the third arg defaults to ASSERT_SET. Signed-off-by: Yang Xiwen <[email protected]>
2024-01-16reset: npcm: Add support for Nuvoton NPCM BMC familyJim Liu
Add reset controller driver for Nuvoton BMCs. The npcm reset driver not only supports reset each module reset but setting initial value of reset Control Registers. And The driver support each module reset. Signed-off-by: Jim Liu <[email protected]>
2024-01-16clk/qcom: handle resets and clocks in one deviceKonrad Dybcio
Qualcomm's clock controller blocks actually do much more than it says on the tin.. They provide clocks, resets and power domains. Currently, U-Boot requires one to spawn 2 separate devices for controlling clocks and resets, both spanning the same register space. Refactor the code to make it work with just a single DT node, making it compatible with upstream Linux bindings and dropping the dedicated reset driver in favour of including it in the clock driver. Heavily inspired by Renesas code for a similar hw block. [caleb: moved drivers to clk/qcom, added reset driver and adjusted bind logic. Imported qcom,gcc-ipq4019.h from Linux] Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2023-11-10tree-wide: Replace http:// link with https:// link for ti.comNishanth Menon
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <[email protected]>
2023-10-16Merge tag 'u-boot-amlogic-20231015' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - add Amlogic A1 clock driver - add Amlogic A1 reset support - add USB Device support for Amlogic A1 - enable RNG on Amlogic A1 & Amlogic S4 - move Amlogic Secure Monitor to standalone driver
2023-10-13scmi: refactor the code to hide a channel from devicesAKASHI Takahiro
The commit 85dc58289238 ("firmware: scmi: prepare uclass to pass channel reference") added an explicit parameter, channel, but it seems to make the code complex. Hiding this parameter will allow for adding a generic (protocol-agnostic) helper function, i.e. for PROTOCOL_VERSION, in a later patch. Signed-off-by: AKASHI Takahiro <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Etienne Carriere <[email protected]>
2023-10-12reset: add support for Amlogic A1 familyAlexey Romanov
This patch adds reset support for the Amlogic A1 family. We add the structure meson_reset_drvdata, which in the future will allow this driver to be used for other families by declaring only the correct parameters reg_count and level_offset. Signed-off-by: Alexey Romanov <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2023-09-24common: Drop linux/printk.h from common headerSimon Glass
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <[email protected]>
2023-08-03reset: mediatek: check malloc return valaue before useWeijie Gao
This patch add missing return value check for allocating the driver's private data. -ENOMEM will be returned if malloc() fails. Signed-off-by: Sam Shih <[email protected]> Signed-off-by: Weijie Gao <[email protected]>
2023-07-20core: read: fix dev_read_addr_size()John Keeping
The behaviour of dev_read_addr_size() is surprising as it does not handle #address-cells and #size-cells but instead hardcodes the values based on sizeof(fdt_addr_t). This is different from dev_read_addr_size_index() and dev_read_addr_size_name() both of which do read the cell sizes from the device tree. Since dev_read_addr_size() is only used by a single driver and this driver is broken when CONFIG_FDT_64BIT does not match the address size in the device tree, fix the function to behave like all of the other similarly named functions. Drop the property name argument as the only caller passes "reg" and this is the expected property name matching the other similarly named functions. Signed-off-by: John Keeping <[email protected]> Reviewed-by: Simon Glass <[email protected]> Tested-by: Simon Glass <[email protected]> # chromebook_jerry Tested-by: Simon Glass <[email protected]> # chromebook_bob
2023-05-17reset: rockchip: implement rk3588 lookup tableEugen Hristev
The current DT bindings for the rk3588 clock use a different ID than the one that is supposed to be written to the hardware registers. Thus, we cannot use directly the id provided in the phandle, but rather use a lookup table to correctly setup the hardware. This approach has been implemented already in Linux, by commit : f1c506d152ff ("clk: rockchip: add clock controller for the RK3588") Hence, implement a similar approach using the lookup table, and adapt the existing reset driver to work with SoCs using lookup table. The file rst-rk3588.c has been copied as much as possible from Linux. Adapt the clk rk3588 driver as well to bind the reset driver with the lookup table. Reviewed-by: Kever Yang <[email protected]> Signed-off-by: Eugen Hristev <[email protected]>
2023-05-09reset: reset-rockchip: fix trivial line spacing alignmentEugen Hristev
Fix line spacing aligment in bind function Fixes: 760188c1aa5b ("rockchip: reset: support a (common) rockchip reset drivers") Signed-off-by: Eugen Hristev <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2023-04-20reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoCYanhong Wang
Add a DM reset driver for StarFive JH7110 SoC. Note that the register base address of reset controller is the same with the clock controller. Therefore, there is no device tree node alone for reset driver.It binds device node in the clock driver Signed-off-by: Yanhong Wang <[email protected]> Tested-by: Conor Dooley <[email protected]>
2023-02-22reset: uniphier: Add USB glue reset supportKunihiko Hayashi
Add reset control support in USB glue logic. This needs to control the external clocks and resets for the logic before accessing the glue logic. The USB dm tree when using dwc3-generic is the following: USB glue +-- controller (need controller-reset) +-- controller-reset (need syscon-reset) +-- phy The controller needs to deassert "controller-reset" in USB glue before the controller registers are accessed. The glue needs to deassert "syscon-reset" before the glue registers are accessed. The glue itself doesn't have "syscon-reset", so the controller-reset controls "syscon-reset" instead. Signed-off-by: Kunihiko Hayashi <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2023-02-12reset: Allow reset_get_by_name() with NULL nameSamuel Holland
This allows devm_reset_control_get(dev, NULL) to work and get the first reset control, which is common in code ported from Linux. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Simon Glass <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-01-05reset: at91: Add reset driver for basic assert/deassert operationsSergiu Moga
Add support for at91 reset controller's basic assert/deassert operations. Since this driver conflicts with the SYSRESET driver because they both bind to the same RSTC node, implement a custom bind hook that would manually bind the sysreset driver, if enabled, to the same RSTC DT node. Furthermore, delete the no longer needed compatibles from the SYSRESET driver and rename it to make sure than any possible conflicts are avoided. Signed-off-by: Sergiu Moga <[email protected]> Tested-by: Mihai Sain <[email protected]> Reviewed-by: Claudiu Beznea <[email protected]>
2022-09-26reset: zynqmp: Enable reset driver for Versal NETJay Buddhabhatti
Enable zynqmp reset driver for Versal NET. Signed-off-by: Jay Buddhabhatti <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c8c26618f87d8451c6ffa9487809a24718bff6a7.1663589964.git.michal.simek@amd.com
2022-08-26reset: qcom: Add support for QCS404 SoC reset tableSumit Garg
Signed-off-by: Sumit Garg <[email protected]>
2022-08-26reset: Convert ipq4019 driver to a generic Qcom driverSumit Garg
Since the base functionality remains the same for a reset driver on Qcom SoCs, so leverage that to convert ipq4019 specific reset driver to a generic Qcom reset driver. With that one just need to provide SoC specific reset table. Signed-off-by: Sumit Garg <[email protected]>
2022-07-26reset: zynqmp: Add reset driver support for versalT Karthik Reddy
Add support for versal platform by adding "xlnx,versal-reset" compatible string in zynqmp-reset driver. Reset numbering schema for versal is not same as zynqmp, so nr_reset and reset_id are set to zero. In case of assert/dessert, required device reset id is sent from respective driver through struct reset_ctl. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-18reset: sunxi: Reuse the platform data from the clock driverSamuel Holland
The clock and reset drivers use the exact same platform data. Simplify them by sharing the object. This is safe because the parent device (the clock device) always gets its driver model callbacks run first. Signed-off-by: Samuel Holland <[email protected]> Acked-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-07-18reset: sunxi: Convert driver private data to platform dataSamuel Holland
The reason here is the same as the reason for changing the clock driver: platform data can be provided when binding the driver. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-07-18reset: sunxi: Get the reset count from the CCU descriptorSamuel Holland
This allows all of the clock drivers to use a common bind function. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Andre Przywara <[email protected]> [Andre: add F1C100s support] Signed-off-by: Andre Przywara <[email protected]>
2022-07-06reset/aspeed: Implement status callbackJoel Stanley
The I2C driver shares a reset line between buses, so allow it to test the state of the reset line before resetting it. Signed-off-by: Joel Stanley <[email protected]> Reviewed-by: Ryan Chen <[email protected]>
2022-06-23reset: scmi: support SCMI multi-channelEtienne Carriere
Update SCMI reset controller driver to get its assigned SCMI channel during initialization. This change allows SCMI reset domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI reset controller driver private data. Signed-off-by: Etienne Carriere <[email protected]>
2022-06-23firmware: scmi: prepare scmi uclass API to multi-channelEtienne Carriere
Changes SCMI driver API function devm_scmi_process_msg() to add an SCMI channel reference argument for when SCMI agent supports SCMI protocol specific channels. First argument of devm_scmi_process_msg() is also change to point to the caller SCMI protocol device rather than its parent device (the SCMI agent device). The argument is a pointer to opaque struct scmi_channel known from the SCMI transport drivers. It is currently unused and caller a pass NULL value. A later change will enable such support once SCMI protocol drivers have means to get the channel reference during initialization. Cc: Lukasz Majewski <[email protected]> Cc: Sean Anderson <[email protected]> Cc: Jaehoon Chung <[email protected]> Signed-off-by: Etienne Carriere <[email protected]>
2022-05-05reset: Return 0 if ops unimplemented and remove empty functionsMarek Vasut
In case the ops is not implemented, return 0 in the core right away. This is better than having multiple copies of functions which just return 0 in each reset driver. Drop all those empty functions. Signed-off-by: Marek Vasut <[email protected]> Cc: Simon Glass <[email protected]> Cc: Tom Rini <[email protected]>
2022-03-02scmi: change parameter dev in devm_scmi_process_msgEtienne Carriere
Changes devm_scmi_process_msg() first argument from target parent device to current SCMI device and lookup the SCMI agent device among SCMI device parents for find the SCMI agent operator needed for communication with the firmware. This change is needed in order to support CCF in clk_scmi driver unless what CCF will fail to find the right udevice related to exposed SCMI clocks. This patch allows to simplify the caller sequence, using SCMI device reference as parameter instead of knowing SCMI uclass topology. This change also adds some protection in case devm_scmi_process_msg() API function is called for an invalid device type. Cc: Lukasz Majewski <[email protected]> Cc: Sean Anderson <[email protected]> Cc: Jaehoon Chung <[email protected]> Cc: Patrick Delaunay <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]> Signed-off-by: Etienne Carriere <[email protected]>
2022-02-08reset: dra7: Add a reset driverKeerthy
Add a reset driver to bring IPs out of reset. Signed-off-by: Keerthy <[email protected]> [Amjad: reset_ops structure member "free" has been renamed to "rfree", use the latter instead] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-01-13treewide: invaild -> invalidSean Anderson
Somewhere along the way, someone misspelt "invalid" and it got copied everywhere. Fix it. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Alexander Dahl <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-11-23reset: scmi: define LOG_CATEGORYPatrick Delaunay
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <[email protected]> Acked-by: Etienne Carriere <[email protected]>
2021-10-11clk: sunxi: Move header out of arch directorySamuel Holland
The CCU header is only used by the DM drivers, not any platform code. Its current location adds an artificial dependency on CONFIG_ARM and ARCH_SUNXI, which will be problematic when adding the CCU driver for a RISC-V sunxi platform. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Bin Meng <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2021-09-30WS cleanup: remove trailing white spaceWolfgang Denk
Signed-off-by: Wolfgang Denk <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk
Signed-off-by: Wolfgang Denk <[email protected]>
2021-08-06reset: zynqmp: Add reset controller for ZynqMP SoCMichal Simek
Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by: Michal Simek <[email protected]>
2021-07-24reset: ast2600: Fix missing reference operatorChia-Wei Wang
Fix missing reference operator '&' to correctly get HW register addresses for writel(). Signed-off-by: Chia-Wei Wang <[email protected]>
2021-07-15reset: Avoid a warning in devm_reset_bulk_get_by_node()Simon Glass
The devres_alloc() function is intended to avoid the need for freeing memory, although in practice it may not be enabled, thus leading to a true leak. Nevertheless this is intended. Add a comment to explain this. Signed-off-by: Simon Glass <[email protected]> Reported-by: Coverity (CID: 312952)
2021-07-14reset: uniphier: Add PCIe reset entryKunihiko Hayashi
Add reset control for PCIe controller on each SoC. Signed-off-by: Kunihiko Hayashi <[email protected]>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Simon Glass <[email protected]>