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https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver
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This patch solves the following warnings:
drivers/serial/serial_stm32.c: In function 'stm32_serial_probe':
warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
if (plat->clock_rate < 0) {
^
Signed-off-by: Patrice Chotard <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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By default LPUART driver with compatible string "fsl,ls1021a-lpuart"
support big-endian mode.On NXP SoC like LS1028A LPUART IP is
little-endian,Added support to Fetch LPUART IP Endianness from lpuart
device-tree node.
Signed-off-by: Vabhav Sharma <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add compatible string for iMX6SX.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Silvio Fricke <[email protected]>
Cc: Stefano Babic <[email protected]>
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- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
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This patch adds devicetree support to the mcfuart.c driver
and removes non DM code.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Angelo Dureghello <[email protected]>
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For STM32MP, the watchdog is based on DM and the function watchod_reset
call the function uclass_get_device(UCLASS_WDT) to found the driver
associated IWDG2.
As this reset is not mandatory in debug putc (the uart fifo will be
empty after some us), we can simplify the code by removing this call.
And this patch avoid issue when putc is called before initialization
of DM core, before the parsing of the device tree parsing and each
node bound to driver; that also avoid memory leak.
Signed-off-by: Patrick Delaunay <[email protected]>
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Remove the trace indicating the end of the DEBUG initialization
Signed-off-by: Patrick Delaunay <[email protected]>
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- A10 FPGA programming support, Gen5 livetree conversion
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Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt <[email protected]>
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This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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Drop unused macros from the header to clean it up.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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There is no RTS7751R2D support in U-Boot, drop all the RTS7751R2D macros.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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There is no SH2007 support in U-Boot, drop all the SH2007 macros.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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There is no H8 support in U-Boot, drop all the H8 macros.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
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Like clk_get_by_index, there is requirement for
clk_get_by_index_nodev. In this case to make common
code functionalities for dev and nodev, clk_get_by_index
is trying to get the index of clock by passing ofnode
instead of actual dev like current gpio uclass does.
In these scenarios with current order of include files
the serial_sifive driver is unable to find CONFIG_ENV_SIZE.
In file included from arch/riscv/include/asm/u-boot.h:23:0,
from include/dm/of.h:10,
from include/dm/ofnode.h:12,
from include/clk.h:11,
from drivers/serial/serial_sifive.c:6:
include/environment.h:145:19: error: 'CONFIG_ENV_SIZE'
undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'?
#define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)
So, fix consists of changing the order of include files
in serial_sifive.c to include first common.h file.
Cc: Anup Patel <[email protected]>
Cc: Rick Chen <[email protected]>
Cc: Paul Walmsley <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Add support for RZ/A1 SoC specifics.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
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There are no more boards using this CPU and there is no prospect
of any boards showing up soon, remove it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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There are no more boards using this CPU and there is no prospect
of any boards showing up soon, remove it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Yoshihiro Shimoda <[email protected]>
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Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some space in the SPL image.
Please note that this fixed clock support is only added to the SPL code
in the DM_SERIAL part of this file. All boards not using SPL & DM_SERIAL
should not be affected.
This patch also introduces CONFIG_SPL_UART_CLOCK for the fixed UART
input clock. It defaults to 132096000 for ARCH_AT91 but can be set to
a different value if needed.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Eugen Hristev <[email protected]>
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Kconfig allows boards to configured with DM_SERIAL and still
have SPL_DM_SERIAL disabled. This patch changes the ifdef's
to CONFIG_IS_ENABLED to allow the modes to differ between
SPL and U-Boot.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
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Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Lukas Auer <[email protected]>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits to prevent an interrupt storm when Linux enables
the UART interrupts.
Signed-off-by: Max Krummenacher <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
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The DM_FLAG_PRE_RELOC shall be enabled in SBSA PL011 uart driver
as this driver is used in NXP based SoCs
It is necessary to have Serial console running before relocation
The !CONFIG_IS_ENABLED(OF_CONTROL) [*] check is set as "workaround"
for DM problem : 4687919684e
This flag is set if board does not support device-tree and using
platform data, In DM Model either of device tree or platform data
can be used to fetch device configuration
It is possible to use SBSA UART with CONFIG_DM_SERIAL but witout
corresponding device tree description (OF_CONTROL)
Other board/SoCs have this flag set unconditionally
Signed-off-by: Vabhav Sharma <[email protected]>
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Apparently we never allocated buffer for arc_serial_platdata
which for some reason never caused problems when executed in nSIM.
But in Qemu this causes expected problems.
Signed-off-by: Alexey Brodkin <[email protected]>
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Fix recent changes to serial API for driver model
Buildman clang support and a few fixes
Small fixes to 'dm tree' and regmap test
Improve sandbox build compatibility
A few other minor fixes
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If _debug_uart_putc() is called before _debug_uart_init(), the
ns16550 debug uart driver hangs in a tight loop waiting for the
tx FIFO to get empty.
As this can happen via a printf sneaking in before the port calls
debug_uart_init(), introduce a config option to ignore characters
before the debug uart is initialized.
This is done by reading the baudrate divisor and aborting if is zero.
The Kconfig option is required as reading the baudrate divisor does
not seem to work for all ns16500 compatibles (which is why the last
attempt on this has been reverted in 1a67969a99).
Tested on socfpga_cyclone5_socrates.
Signed-off-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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DEBUG_UART_SKIP_INIT is used only by debug UART and thus should depend
on DEBUG_UART.
Signed-off-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
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All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
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All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
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This patch adds SiFive UART driver. The driver is 100% DM driver
and it determines input clock using clk framework.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Palmer Dabbelt <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
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In some cases, UART is configured by early boot stage.
To be sure of the initial state of UART and to avoid
spurious chars on console, reset the serial block before
configuring it.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but
CONFIG_SPL_PCI_SUPPORT disabled, results in following linker
error:
lib/built-in.o: In function `fdtdec_get_pci_bar32':
lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32'
fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32'
This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c
while SPL build does not descend into drivers/pci directory in
drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled.
Fix this by applying appropriate #define guards in lib/fdtdec.c.
It looks like ns16550.c has the same problem, so fixed that too.
To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI
(enables use of CONFIG_IS_ENABLED() macro).
Suggested-by: Vignesh R <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
Reviewed-by: Lokesh Vutla <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.
Signed-off-by: Felix Brack <[email protected]>
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Signed-off-by: Álvaro Fernández Rojas <[email protected]>
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Signed-off-by: Álvaro Fernández Rojas <[email protected]>
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New callback will supply necessary information, for example,
to ACPI SPCR table.
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Cache the value of the reg-io-width property for the future use.
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error:
Signed-off-by: Simon Glass <[email protected]>
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In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This reverts commit 6f57c34473d37b8da5e6a3764d0d377d748aeef1 since it
does not seem to work at least on rk3399.
The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.
Reported-by: Roosen Henri <[email protected]>
Signed-off-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
Reviewed-by: Kever Yang <[email protected]
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Signed-off-by: Christophe Leroy <[email protected]>
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Signed-off-by: Christophe Leroy <[email protected]>
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Many SoCs from MediaTek have a high-speed uart. This UART is compatible
with the ns16550 in legacy mode. It has extra registers for high-speed
mode which can reach a maximum baudrate at 921600.
However this UART will no longer be compatible if it's in high-speed mode.
Some BootROM of MediaTek's SoCs will change the UART into high-speed mode
and the U-Boot must use this driver to initialize the UART.
Signed-off-by: Weijie Gao <[email protected]>
Tested-by: Ryder Lee <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add possibility to update the serial parity used.
Signed-off-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Hannes Schmelzer <[email protected]>
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