| Age | Commit message (Collapse) | Author |
|---|
|
Prepare v2023.10-rc3
Signed-off-by: Tom Rini <[email protected]>
|
|
Waiting 150us TC bit couldn't be enough.
If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time
of 10 bits (1 byte in most use cases) at a baud rate of 115200).
Fixes: b4dbc5d65a67 ("serial: stm32: Wait TC bit before performing initialization")
Signed-off-by: Valentin Caron <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0". However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
This patch ensures driver private data being fully initialized in
_debug_uart_init which is not covered by .priv_auto ops.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
Before this change the FR_TXFF (Transmit FIFO full) bit (5 in
HW_UARTDBG_FR) has been used to assess if there is still data pending
to be sent via UART.
This approach is problematic, as it may happen that serial is in the
middle of transmission (so the TX FIFO is NOT full anymore) and this
test returns true infinitely. As a result, for example in _serial_flush()
DM serial function we are locked in endless while().
The fix here is to test explicitly if the TX FIFO is empty.
Signed-off-by: Lukasz Majewski <[email protected]>
|
|
This commit prepares the pl01x serial driver to be used with
SPL_OF_PLATDATA enabled.
Signed-off-by: Lukasz Majewski <[email protected]>
|
|
Before this change, building this driver for SPL with enabled SPL_DM_SERIAL
was problematic, as '-Wunused-const-variable=' warning was visible.
Now, the code is only considered when u-boot proper is build.
Signed-off-by: Lukasz Majewski <[email protected]>
|
|
To avoid spurious chars, BRR register must only be written when
USART is disabled.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
|
|
In case there is still chars from previous bootstage to transmit, wait
for TC (Transmission Complete) bit to be set which ensure that the last
data written in the USART_TDR has been transmitted out of the shift
register.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
|
|
According to the dm_serial_ops documentation, pending() should:
> @return number of waiting characters, 0 for none, -ve on error
And:
> It is acceptable to return 1 if an indeterminant number
> of characters is waiting.
With the current implementation, we have:
* FIFO is full -> pending() returns 0
* FIFO is partially used -> pending() returns 1
* FIFO is empty -> pending() returns 1
This is not the same as what the documentation requires.
Moreover, since [1], arm reset now flushes all console devices
(including serial) before the cpu gets reset.
Because of the flawed logic:
=> reset # user calls reset
flush() is called
_serial_flush() is called
ops->pending(dev, false) # never returns false
# board hangs indefinitely without resetting.
Fix it by using AML_UART_TX_EMPTY instead of AML_UART_TX_FULL.
[1] commit c5f4cdb8eb60 ("console: Use flush() before panic and reset"),
Signed-off-by: Mattijs Korpershoek <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Add trivial driver for the MXS AUART IP. This is the other UART IP
present in i.MX23 and i.MX28, used to drive the non-DUART ports.
Signed-off-by: Marek Vasut <[email protected]>
|
|
When coreboot does not pass a UART in its sysinfo struct, there is no
easy way to find it out.
Since coreboot does not actually init the serial device when serial is
disabled, it is not possible to make it add this information to the
sysinfo table.
Add a way to obtain this information from the DBG2 ACPI table, which is
normally set up by coreboot.
For now this only supports a memory-mapped 16550-style UART.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Rockchip NFC driver update and dev addr pointer api update;
- use standard dr_mode for usb driver;
- rock pi boards dts update;
- Add rk3566 Anbernic boards;
- Misc fixes for drivers;
|
|
https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
This pull request adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.
|
|
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Instead of inhibiting parameter RAM relacation, take
into account the configured one.
It means INIT_TRX command cannot be used and must be done
manually as explained in the microcode patch application note.
Signed-off-by: Christophe Leroy <[email protected]>
|
|
With relocation, CPM parameter RAM can be anywhere in the
dual port RAM, so don't split dual port RAM.
Remove dparam and dparam16 members of struct comm_proc
PROFF_XXX become offsets from the start of dual port RAM,
then they are now consistant with the offsets in RPBASE
registers.
Signed-off-by: Christophe Leroy <[email protected]>
|
|
Starting from QUP v2.5 the value of oversampling is changed from 32
to 16, keeping the old value on newer platforms results on wrong set
UART IP clock divider, thus the asked baudrate does not correspond to
the actually set with all the consequencies for a user.
The change links the driver to a new Qualcomm GENI SE QUP driver
to get its hardware version and update the oversampling value.
Deliberately the code under CONFIG_DEBUG_UART_MSM_GENI is not touched,
since a wanted baudrate can be controlled by setting a modified
CONFIG_DEBUG_UART_CLOCK build time variable.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
|
|
The name "se" is used in upstream Linux device trees and has been for
ages, long before this U-Boot-ism was introduced. Same goes for the
existing compatible. Get rid of that.
[vzapolskiy: removed a ready change in the driver]
Signed-off-by: Konrad Dybcio <[email protected]>
Signed-off-by: Vladimir Zapolskiy <[email protected]>
|
|
A compiler warns about a missing function prototype, which is valid
and fixed by converting the function into static one, also fix
interleaved local variable declarations and assignments.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Fixes: 324df15a292e ("serial: qcom: add support for GENI serial driver")
Reviewed-by: Konrad Dybcio <[email protected]>
|
|
This a cosmetic change, which corrects code indentation in a few places.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
|
|
There is only one clock supplier to the serial IP, thus getting it by
name is not needed, also note that "clock-names" property is not listed
under doc/device-tree-bindings/serial/msm-geni-serial.txt, and finally
"se-clk" clock name is invalid, if added, it shall get "se" value like
it's already described in Linux device tree documentation.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
|
|
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.
[vzapolskiy: extracted the driver change from a combination with dts changes]
Signed-off-by: Konrad Dybcio <[email protected]>
Signed-off-by: Vladimir Zapolskiy <[email protected]>
|
|
For whatever reason, likely a driver stub was copied from another
driver, the driver contains a bunch of unnecessary and confusing
includes like watchdog.h etc., the change reduces the list.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-sh
- Initial R-Car Generation 4 support
|
|
Provide the basic HSCIF support for R-Car SoC.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Fill in HSSRR offset for Gen2 and SCBRR calculation for Gen2 and Gen3]
Reviewed-by: Simon Glass <[email protected]>
|
|
Add R-Car Gen4 family support. The basic function is as same as previous
R-Car Generation.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Swap RZ/A1 and Gen4 to keep the GenN sequence, use RCAR_64]
|
|
As the updated comment says, this is already handled by
fdt_path_offset_namelen() itself.
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
Make the indent of these macro elements consistent with the
rest of this table. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add support for debug output very early during boot using the DEBUG_UART
mechanism. This uses a static fixed UART port configuration selected via
Kconfig options and dedicated print functions from debug_uart.h. This is
useful e.g. when debugging problems so early during boot, that not even
the DM is initialized at that point, and thus DM_SERIAL is not available
either.
This functionality is disabled by default. To activate it, define the
following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/
CFG_HSCIF/<nothing for regular SCIF>:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_SCIF=y
CONFIG_DEBUG_UART_BASE=0xe6540000
CONFIG_DEBUG_UART_CLOCK=24000000
The later two options define the SCIF physical base address and SCIF
input clock in Hz. Optionally, to validate DEBUG_UART works, enable
the following as well to get early serial output message by default:
CONFIG_DEBUG_UART_ANNOUNCE=y
Signed-off-by: Marek Vasut <[email protected]>
|
|
Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a
matching Kconfig entry because they are internal to the SCIF driver.
Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI,
to reflect that and avoid interferring with Kconfig symbols. Since
neither of those options are defined elsewhere, no functional change.
Signed-off-by: Marek Vasut <[email protected]>
|
|
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_OF_BOARD defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
|
|
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DEBUG_UART_ZYNQ defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
|
|
This option does not exist, so the code attached to it is not used. Drop
it.
Signed-off-by: Simon Glass <[email protected]>
|
|
Instead of waiting for empty FIFO condition before writing a
character, wait for non-full FIFO condition.
This helps in saving several tens of milliseconds during boot
(depending verbosity).
Signed-off-by: Loic Poulain <[email protected]>
Tested-by: Lothar Waßmann <[email protected]>
Acked-by: Pali Rohár <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
|
|
The u-boot console may show some corrupted characters when
printing in board_init() due to reset or baudrate change
of the UART (probe) before the TX FIFO has been completely
drained.
To fix this issue, and in case UART is still running, we now
try to flush the FIFO before proceeding to UART reinitialization.
For this we're waiting for Transmitter Complete bit, indicating
that the FIFO and the shift register are empty.
flushing has a 4ms timeout guard, which is normally more than
enough to consume the FIFO @ low baudrate (9600bps).
Signed-off-by: Loic Poulain <[email protected]>
Tested-by: Lothar Waßmann <[email protected]>
Acked-by: Pali Rohár <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
There are no SPL/TPL variants of CONFIG_CLK_EXYNOS and
CONFIG_ARCH_APPLE, so switch from CONFIG_IS_ENABLED to
IS_ENABLED.
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
For this legacy driver, the only user sets these values in Kconfig, so
we can remove them from the header.
Signed-off-by: Tom Rini <[email protected]>
|
|
Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to
DM_SERIAL.
Signed-off-by: Stefan Bosch <[email protected]>
|
|
Add dm_serial driver source code for S5P4418 SOC. Extend the "arm,pl011"
driver by init of UART-clock and UART-reset.
Signed-off-by: Stefan Bosch <[email protected]>
|
|
U-Boot serial code already handles -EAGAIN value from getc and putc
callbacks. So change drivers code to return -EAGAIN when HW is busy instead
of doing its own busy loop and waiting until HW is ready.
Signed-off-by: Pali Rohár <[email protected]>
|
|
serial-uclass.c code already puts \r before \n for all dm_serial drivers.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST
namespace.
Signed-off-by: Tom Rini <[email protected]>
|
|
At this point in the conversion there should be no need to have logic to
disable some symbol during the SPL build as all symbols should have an
SPL counterpart.
The main real changes done here are that we now must make proper use of
CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we
developed prior to CONFIG_IS_ENABLED() being available.
Signed-off-by: Tom Rini <[email protected]>
|
|
Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID
Signed-off-by: Tom Rini <[email protected]>
|
|
Perform a simple rename of CONFIG_USART_BASE to CFG_USART_BASE
Signed-off-by: Tom Rini <[email protected]>
|
|
Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A
Signed-off-by: Tom Rini <[email protected]>
|
|
Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS
Signed-off-by: Tom Rini <[email protected]>
|
|
Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK
Signed-off-by: Tom Rini <[email protected]>
|
