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Integrate function and struct name from ae3xx to
atcspi200 will be more reasonable.
Signed-off-by: Rick Chen <[email protected]>
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atcspi200 is Andestech spi ip which is embedded in
AE3XX and AE250 platforms. So rename as atcspi200
will be more reasonable to be used in different
platforms.
Signed-off-by: Rick Chen <[email protected]>
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fix typo
Signed-off-by: Heinrich Schuchardt <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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fix typo
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Last user of this option went away in commit:
fdc7718999 ("board: usb_a9263: Update to support DT and DM")
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Acked-by: Wenyou Yang <[email protected]>
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U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <[email protected]>
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The DM support is already in the driver, so add
da830-spi to the compatible list.
Reviewed-by: Jagan Teki <[email protected]>
Signed-off-by: Adam Ford <[email protected]>
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In some of the QSPI controller version, there must be atleast
128bit data available in TX FIFO for any pop operation otherwise
error bit will be set. The code will not make any behavior change
for previous controller as the transfer data size in ipcr register
is still the same.
Patch is tested on LS1046A which do not require 16 bytes aligned and
LS1088A which require 16 bytes aligned data in TX FIFO
Signed-off-by: Suresh Gupta <[email protected]>
Signed-off-by: Anupam Kumar <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device
Signed-off-by: Suresh Gupta <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add driver model support for mxc spi driver.
Most functions are restructured to be reused by DM and non-DM.
Tested on mx6slevk/mx6qsabresd board.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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Support spi driver and can detect MX25U1635E flash on AE3XX board.
Verification:
sf probe 0:0 50000000 0
spi_flash_std_probe(sf_Probr.c)
spi_flash_probe_slave(sf_Probr.c)
SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
NDS32 # sf test 0x100000 0x1000
SPI flash test:
0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
1 check: 15 ticks, 266 KiB/s 2.128 Mbps
2 write: 21 ticks, 190 KiB/s 1.520 Mbps
3 read: 11 ticks, 363 KiB/s 2.904 Mbps
Test passed
0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
1 check: 15 ticks, 266 KiB/s 2.128 Mbps
2 write: 21 ticks, 190 KiB/s 1.520 Mbps
3 read: 11 ticks, 363 KiB/s 2.904 Mbps
Signed-off-by: rick <[email protected]>
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Update the Rockchip SPI driver to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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The atomic preop register can only be written when SPI settings are
not locked, otherwise it's read-only.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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In ich_spi_xfer() when the driver presets control fields, control
variable gets assigned twice. Apparently only the last assignment
takes effect. Remove the other one.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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At present the ICH SPI opcode registers configuration is done in the
ich_spi_remove() routine, a little bit weird but that's how current.
Linux MTD driver works. This changes to move the opcode registers
configuration to a separate routine ich_spi_config_opcode() which
might be called by U-Boot itself as well.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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At present the ICH SPI controller driver reads the controller lock
status from its register in the probe routine and saves the lock
status to a member of priv. Later the driver uses the cached status
from priv to judge whether the controller setting is locked and do
different setup.
But such logic is only valid when there is only the SPI controller
driver that touches the SPI hardware. In fact the lock status change
can be trigged outside the driver, eg: during the fsp_notify() call
when Intel FSP is used.
This changes the driver to read the lock status every time when an
SPI transfer is initiated instead of reading the cached one.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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There is no need to do another assignment to ich7_spi.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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This routine is not called anywhere.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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For the RK3368, we can reuse the SPI driver (although we'll have to
eventually investigate whether it can be merged with the
designware_spi.c driver) also used for the RK3288 and RK3399.
This adds the necessary compatible string to support the RK3368.
Note that the assumption that GPLL will be clocked at 594MHz is not
true for the RK3368, but this will not lead to incorrect functioning
(just to a lower-than-expected SPI operating frequency): this has been
documented in the driver, so it doesn't cause any headaches when
someone next needs to touch the clock code of this driver.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The OMAP3_SPI driver can work with or without DM_SPI. Moving this
outside of the #if DM_SPI section allows us to include it on boards
that don't support DM_SPI yet.
Signed-off-by: Adam Ford <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
Conflicts:
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
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Pet the watchdog once upon each command call (qspi_xfer) and during
each loop iteration in several commands.
This fixes a watchdog reset especially during erase command.
Signed-off-by: Alexander Stein <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Update the tegra114 spi driver to support a live device tree.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <[email protected]>
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Adjust this to take a device as a parameter instead of a node.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <[email protected]>
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Replace proprietary clock_get() by clk_get_rate()
The stm32_qspi is now "generic" and can be used
by other STM32 SoCs.
Signed-off-by: Patrice Chotard <[email protected]>
Acked-by: Vikas MANOCHA <[email protected]>
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Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.
This change is also coherent with the structure in kernel.
Signed-off-by: Stefano Babic <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: Akshay Bhat <[email protected]>
CC: Ken Lin <[email protected]>
CC: Marek Vasut <[email protected]>
CC: Heiko Schocher <[email protected]>
CC: "Sébastien Szymanski" <[email protected]>
CC: Christian Gmeiner <[email protected]>
CC: Stefan Roese <[email protected]>
CC: Patrick Bruenn <[email protected]>
CC: Troy Kisky <[email protected]>
CC: Nikita Kiryanov <[email protected]>
CC: Otavio Salvador <[email protected]>
CC: "Eric Bénard" <[email protected]>
CC: Jagan Teki <[email protected]>
CC: Ye Li <[email protected]>
CC: Peng Fan <[email protected]>
CC: Adrian Alonso <[email protected]>
CC: Alison Wang <[email protected]>
CC: Tim Harvey <[email protected]>
CC: Martin Donnelly <[email protected]>
CC: Marcin Niestroj <[email protected]>
CC: Lukasz Majewski <[email protected]>
CC: Adam Ford <[email protected]>
CC: "Albert ARIBAUD (3ADEV)" <[email protected]>
CC: Boris Brezillon <[email protected]>
CC: Soeren Moch <[email protected]>
CC: Richard Hu <[email protected]>
CC: Wig Cheng <[email protected]>
CC: Vanessa Maegima <[email protected]>
CC: Max Krummenacher <[email protected]>
CC: Stefan Agner <[email protected]>
CC: Markus Niebel <[email protected]>
CC: Breno Lima <[email protected]>
CC: Francesco Montefoschi <[email protected]>
CC: Jaehoon Chung <[email protected]>
CC: Scott Wood <[email protected]>
CC: Joe Hershberger <[email protected]>
CC: Anatolij Gustschin <[email protected]>
CC: Simon Glass <[email protected]>
CC: "Andrew F. Davis" <[email protected]>
CC: "Łukasz Majewski" <[email protected]>
CC: Patrice Chotard <[email protected]>
CC: Nobuhiro Iwamatsu <[email protected]>
CC: Hans de Goede <[email protected]>
CC: Masahiro Yamada <[email protected]>
CC: Stephen Warren <[email protected]>
CC: Andre Przywara <[email protected]>
CC: "Álvaro Fernández Rojas" <[email protected]>
CC: York Sun <[email protected]>
CC: Xiaoliang Yang <[email protected]>
CC: Chen-Yu Tsai <[email protected]>
CC: George McCollister <[email protected]>
CC: Sven Ebenfeld <[email protected]>
CC: Filip Brozovic <[email protected]>
CC: Petr Kulhavy <[email protected]>
CC: Eric Nelson <[email protected]>
CC: Bai Ping <[email protected]>
CC: Anson Huang <[email protected]>
CC: Sanchayan Maity <[email protected]>
CC: Lokesh Vutla <[email protected]>
CC: Patrick Delaunay <[email protected]>
CC: Gary Bisson <[email protected]>
CC: Alexander Graf <[email protected]>
CC: [email protected]
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This change covers the rk_spi.c (SPI driver) used in Rockchip devices.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Signed-off-by: Christophe Leroy <[email protected]>
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AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).
Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).
There is no good point to keep this support in U-Boot either.
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
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For devices that need a delay between SPI transactions we seem to need an
additional delay before the first one if the CPU is running at full speed.
Add this, under control of the existing setting. At present it will only
be enabled with the Chrome OS EC.
Signed-off-by: Simon Glass <[email protected]>
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Update the SPI uclass to support a live device tree. Also adjust
spi_slave_ofdata_to_platdata() to accept a device instead of a blob and
offset.
Signed-off-by: Simon Glass <[email protected]>
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Add support for requesting GPIOs with a live device tree.
This involves adjusting the function signature for the legacy function
gpio_request_by_name_nodev(), so fix up all callers.
Signed-off-by: Simon Glass <[email protected]>
Fixes to stm32f746-disco.c:
Signed-off-by: Tom Rini <[email protected]>
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At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: Simon Glass <[email protected]>
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It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.
Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.
Signed-off-by: Simon Glass <[email protected]>
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These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree
2. devfdt_get_addr...() - current functions, flat tree only
3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <[email protected]>
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Add the Kconfig entry for SOFT_SPI which uses gpio to simulate the
SPI signals. We use it for accessing 74x164 on some i.MX boards.
Signed-off-by: Peng Fan <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Stefano Babic <[email protected]>
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This patch adds a remove function to the Intel ICH SPI driver, that will
be called upon U-Boot exit, directly before the OS (Linux) is started.
This function takes care of configuring the BIOS registers in the SPI
controller (similar to what a "standard" BIOS or coreboot does), so that
the Linux MTD device driver is able to correctly read/write to the SPI
NOR chip. Without this, the chip is not detected at all.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Jagan Teki <[email protected]>
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This particular quirk is not enabled in any config files today. It does
however exist and is handled correctly in device trees and via
CONFIG_DM_SPI. So we drop the symbol now and add a comment to indicate
that any (new) boards that require this quirk need to enable DM_SPI
instead.
Signed-off-by: Tom Rini <[email protected]>
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The existing Rockchip SPI (rk_spi.c) driver also matches the hardware
block found in the RK3399. This has been confirmed both with SPI NOR
flashes and general SPI transfers on the RK3399-Q7 for SPI1 and SPI5.
This change adds the 'rockchip,rk3399-spi' string to its compatible
list to allow reuse of the existing driver.
X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: Jakob Unterwurzacher <[email protected]>
Acked-by: Simon Glass <[email protected]>
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The baudrate in rkspi was calculated by using an integer division
(which implicitly discarded any fractional result), then rounding to
an even number and finally clamping to 0xfffe using a bitwise AND
operator. This introduced two issues:
1) for very small baudrates (overflowing the 0xfffe range), the
bitwise-AND generates rather random-looking (wildly varying)
actual output bitrates
2) for higher baudrates, the calculation tends to 'err towards a
higher baudrate' with the actual error increasing as the dividers
become very small. E.g., with a 99MHz input clock, a request
for a 20MBit baudrate (99/20 = 4.95), a 24.75 MBit would be use
(which amounts to a 23.75% error)... for a 34 MBit request this
would be an actual outbout of 49.5 Mbit (i.e. a 45% error).
This change rewrites the divider selection (i.e. baudrate calculation)
by making sure that
a) for the normal case: the largest representable baudrate below the
requested rate will be chosen;
b) for the denormal case (i.e. when the divider can no longer be
represented), the lowest representable baudrate is chosen.
Even though the denormal case (b) may be of little concern in real
world applications (even with a 198MHz input clock, this will only
happen at below approx. 3kHz/3kBit), our board-verification team kept
complaining.
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: Klaus Goger <[email protected]>
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The original clock/bitrate selection code for the rk_spi driver was a
bit limited, as it always selected a 99MHz input clock rate (which
would allow for a maximum bitrate of 49.5MBit/s), but returned -EINVAL
if a bitrate higher than 48MHz was requested.
To give us better control over the bitrate (i.e. add more operating
points, especially at "higher" bitrate---such as above 9MBit/s), we
try to choose 4x the maximum frequency (clamped to 50MBit) from the
DTS instead of 99MHz... for most use-cases this will yield a frequency
of 198MHz, but is flexible to go beyond this in future configurations.
This also rewrites the check to allow frequencies of up to half the
SPI module rate as bitrates and then clamps to whatever the DTS allows
as a maximum (board-specific) frequency and does away with the -EINVAL
when trying to select a bitrate (for cases that exceeded the hard
limit) and instead consistently clamps to the lower of the hard limit,
the soft limit for the SPI bus (from the DTS) or the soft limit for
the SPI slave device.
This replaces
"rockchip: spi: rk_spi: select 198MHz input to the SPI module for the RK3399"
"rockchip: spi: rk_spi: improve clocking code for the RK3399"
from earlier versions of this series.
Signed-off-by: Philipp Tomsich <[email protected]>
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Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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.probe method has been assigned twice when declaring
a driver with U_BOOT_DRIVER(). Removed one of them.
Here is the last commit which had the duplicate entry:
"spi: omap3: Convert to driver model"
(sha1: 77b8d04854f486741471ad02b93b473b5b3d72f8)
Signed-off-by: Suniel Mahesh <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This is not currently implemented. Add support for this so that the
Chrome OS EC can be used reliably.
Signed-off-by: Moritz Fischer <[email protected]>
Acked-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Before using the cs_gpio, check if the GPIO is valid or not.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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The architecture is currently unmaintained, remove.
Cc: Benjamin Matthews <[email protected]>
Cc: Chong Huang <[email protected]>
Cc: Dimitar Penev <[email protected]>
Cc: Haitao Zhang <[email protected]>
Cc: I-SYST Micromodule <[email protected]>
Cc: M.Hasewinkel (MHA) <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Martin Strubel <[email protected]>
Cc: Peter Meerwald <[email protected]>
Cc: Sonic Zhang <[email protected]>
Cc: Valentin Yakovenkov <[email protected]>
Cc: Wojtek Skulski <[email protected]>
Cc: Wojtek Skulski <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.
This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Acked-by: Simon Glass <[email protected]>
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SOC’s like LS1012A has only one chip select signal for QSPI flash.
Avoid scanning other flash.
Signed-off-by: Suresh Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
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