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2023-12-26spi: npcm_pspi: Fix the wrong clock divider calculationJim Liu
Fix the wrong clock divider calculation. Signed-off-by: Jim Liu <[email protected]>
2023-12-21global: Remove duplicate common.h inclusionsTom Rini
These files include <common.h> twice. Start by removing the second inclusion of the file. Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2023-12-18Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi ↵Tom Rini
into next - spi_nor_read_sfdp_dma_unsafe (Vaishnav) - w25q01/02 (Jim)
2023-12-14spi: cadence-quadspi: Fix error message on stuck busy stateJan Kiszka
We are not iterating CQSPI_REG_RETRY, we are waiting 'timeout' ms, since day 1. Signed-off-by: Jan Kiszka <[email protected]> Reviewed-by: Stefan Roese <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-12-13drivers: xilinx_spi: Probe fifo_depth at runtimeMayuresh Chitale
If the fifo-size DT parameter is not provided then probe the controller's fifo depth at runtime. This is ported from a patch in the Linux Xilinx SPI driver. Signed-off-by: Mayuresh Chitale <[email protected]> Reviewed-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Love Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-12-13drivers: xilinx_spi: Add xfer callbackMayuresh Chitale
Add the xfer callback which is used by the MMC_SPI driver and generally by the dm_spi_xfer callback. Signed-off-by: Mayuresh Chitale <[email protected]> Tested-by: Love Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-12-13drivers: xilinx_spi: Use udevice in start_tranferMayuresh Chitale
Modify start_transfer and related functions to take a udevice parameter as input instead of spi_slave. This is needed so that start_transfer can be used directly via the xfer callback. Also fix a compiler warning. Signed-off-by: Mayuresh Chitale <[email protected]> Tested-by: Love Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-12-09spi: cadence_qspi: Select flash subnode at runtimeUdit Kumar
Currently spi driver gets flash parameter from first subnode. Few boards have more than one flash with different parameters and selection of flash is done by on board switch settings. In such case, uboot needs to be recompiled with updated device tree to align with board switch settings. This patch allows to select flash node at runtime. Boards those are supporting multiple flashes needs to implement cadence_qspi_get_subnode function and return correct flash node. Cc: Apurva Nandan <[email protected]> Signed-off-by: Udit Kumar <[email protected]> Reviewed-by: Neha Malcom Francis <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-12-06spi: bcm63xx-hsspi: Fix compiler warningWilliam Zhang
When build for arm64 target, comipler reports the following warning: drivers/spi/bcm63xx_hsspi.c: In function ‘bcm63xx_hsspi_xfer_dummy_cs’: include/linux/kernel.h:184:17: warning: comparison of distinct pointer types lacks a cast 184 | (void) (&_min1 == &_min2); \ | ^~ drivers/spi/bcm63xx_hsspi.c:298:22: note: in expansion of macro ‘min’ 298 | size_t curr_step = min(step_size, data_bytes); This change fix this warning by casting the data_bytes to size_t. Fixes: 0e144ec38cbb ("spi: bcm63xx-hsspi: Add prepend mode support") Signed-off-by: William Zhang <[email protected]>
2023-11-28Merge patch series "Import "string" I/O functions from Linux"Tom Rini
To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
2023-11-28treewide: Include linux/io.h instead of asm-generic/io.hIgor Prusov
Directly including asm-generic/io.h may break build because it will cause redefenition of generic io macros if linux/io.h gets included later, hence replace it with direct include of linux/io.h Signed-off-by: Igor Prusov <[email protected]>
2023-11-28spi: meson_spifc_a1: Switch to io{read,write}32_rep()Igor Prusov
Use io{read,write}32_rep() functions to sync code with Linux version. Signed-off-by: Igor Prusov <[email protected]>
2023-11-20Merge tag 'v2024.01-rc3' into nextTom Rini
Prepare v2024.01-rc3
2023-11-16treewide: use linux/time.h for time conversion definesIgor Prusov
Now that we have time conversion defines from in time.h there is no need for each driver to define their own version. Signed-off-by: Igor Prusov <[email protected]> Reviewed-by: Svyatoslav Ryhel <[email protected]> # tegra Reviewed-by: Eugen Hristev <[email protected]> #at91 Reviewed-by: Caleb Connolly <[email protected]> #qcom geni Reviewed-by: Stefan Bosch <[email protected]> #nanopi2 Reviewed-by: Patrice Chotard <[email protected]>
2023-11-16spi: meson_spifc_a1: Use define for time intervalIgor Prusov
Use USEC_PER_MSEC define for timeout to sync code with Linux version. Signed-off-by: Igor Prusov <[email protected]>
2023-11-10tree-wide: Replace http:// link with https:// link for ti.comNishanth Menon
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <[email protected]>
2023-11-07spi: Add <errno.h> to spi-mem-nodm.cTom Rini
This file uses errno return values in functions, so include <errno.h> here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <[email protected]>
2023-11-07zynqmp: migrate gqspi debug to loggingIbai Erkiaga
The following patch migrates the usage of debug and printf functions to the relevant logging function as per U-Boot DM guidelines. Additionally some of the debugging statements have been rearanged for a more meaningfull debug experience. aarch64-linux-gnu-size reports 229 bytes less when debug is enabled at file level, while is just 5bytes more when disabled. Signed-off-by: Ibai Erkiaga <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-11-07spi: cadence_ospi_versal: Add support for 64-bit addressVenkatesh Yadav Abbarapu
When 64-bit address is passed only lower 32-bit address is getting updated. Program the upper 32-bit address in the DMA destination memory address MSBs register. Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-10-30Kconfig: Remove all default n/no optionsMichal Simek
Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all default n/no options") and again sync is required. default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Svyatoslav Ryhel <[email protected]> # tegra Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Angelo Dureghello <[email protected]>
2023-10-27spi: add support for Amlogic A1 SPI Flash ControllerIgor Prusov
Add A1 SPIFC driver from Linux. Slightly modified to use u-boot driver framework and accommodate to lack of ioread32_rep/iowrite32_rep. Based on Linux version 6.6-rc4 Signed-off-by: Igor Prusov <[email protected]> Signed-off-by: Martin Kurbanov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> [trini: Drop <common.h> as it's not needed]
2023-10-11spi: mtk_spim: prevent global pll clock overrideNicolò Veronese
With commit 793e62301180 ("spi: mtk_spim: get spi clk rate only once") a new system to calculate the SPI clocks has been added. Unfortunately, the do_div macro overrides the global priv->pll_clk_rate field. This will cause to have a reduced clock rate on each subsequent SPI call. Signed-off-by: Valerio 'ftp21' Mancini <[email protected]> Signed-off-by: Nicolò Veronese <[email protected]>
2023-10-10spi: nxp_fspi: reset the FLSHxCR1 registersHan Xu
Reset the FLSHxCR1 registers to default value. ROM may set the register value and it affects the SPI NAND normal functions. Signed-off-by: Han Xu <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2023-09-24common: Drop linux/printk.h from common headerSimon Glass
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <[email protected]>
2023-09-21spi: zynqmp_qspi: Workaround for small data cache issueVenkatesh Yadav Abbarapu
Cache related issues are seen with small sized data reads. Due to this, proper data is not read. Also some times sf probe fails randomly. To workaround this issue, invalidate dcache after read DMA is triggered. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-09-21spi: zynqmp_qspi: Change flush cache to invalidate cacheAshok Reddy Soma
Before DMA read, ideally cache should be invalidated, so that data from memory will be updated to cache after DMA is completed. But flush_dcache_range is being used which is incorrect. Change flush_dcache_range to invalidate_dcache_range. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-09-14spi: Remove unused NEEDS_MANUAL_RELOC code bitsMarek Vasut
The last user of the NEEDS_MANUAL_RELOC has been removed in commit 26af162ac8f8 ("arch: m68k: Implement relocation") Remove now unused NEEDS_MANUAL_RELOC code. Signed-off-by: Marek Vasut <[email protected]>
2023-08-03spi: mtk_spim: clear IRQ enable bitsWeijie Gao
In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS. However these IRQ enable bits may be set in previous boot stage (BootROM). If we leave these bits not cleared, although u-boot has disabled IRQ and nothing will happen, the linux kernel may encounter panic during initializing the spim driver due to IRQ event happens before IRQ handler is properly setup. This patch clear IRQ bits to prevent this from happening. Signed-off-by: SkyLake.Huang <[email protected]> Signed-off-by: Weijie Gao <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-08-03spi: mtk_spim: get spi clk rate only onceWeijie Gao
We don't really need to switch clk rate during operating SPIM controller. Get clk rate only once at driver probing. Signed-off-by: SkyLake.Huang <[email protected]> Signed-off-by: Weijie Gao <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-21cadence_qspi: Enable flash reset for Versal NET platformAshok Reddy Soma
Enable flash reset functionality for Versal NET platform. In cadence_qspi.c there is weak function defined for reset, hence remove the check for config, so that it will work for Versal and Versal NET platforms. Add register defines in Versal NET hardware.h for mini U-Boot flash reset. Add read_delay initialization for Versal NET also. Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-07-21spi: zynq_qspi: Add missing prototype for zynq_qspi_mem_exec_opAlgapally Santosh Sagar
Add missing prototype to fix the sparse warning, warning: no previous prototype for 'zynq_qspi_mem_exec_op' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-07-21spi: xilinx_spi: Add missing prototype for xilinx_qspi_mem_exec_opAlgapally Santosh Sagar
Add missing prototype to fix the below sparse warning warning: no previous prototype for 'xilinx_qspi_mem_exec_op' [-Wmissing-prototypes] Signed-off-by: Algapally Santosh Sagar <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2023-07-13spi: npcm_pspi: use ACTIVE_LOW flag for cs gpio and set default max_hzJim Liu
If cs gpio is requested with ACTIVE_HIGH flag, it will be pulled low(i.e. active). This is not what we expected. Signed-off-by: Jim Liu <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: soft_spi: Support the recommended soft spi propertiesFabio Estevam
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml from Linux, the recommended spio-gpio properties are: sck-gpios, miso-gpios and mosi-gpios. gpio-sck, gpio-mosi and gpio-miso are considered deprecated. Currently, U-Boot only supports the deprecated properties. Allow the soft_spi driver to support both the new and old properties. Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: synquacer: remove SPI_TX_BYTE handlingMasahisa Kojima
Current code expects that SPI_TX_BYTE is single bit mode but it is wrong. It indicates byte program mode, not single bit mode. If SPI_TX_DUAL, SPI_TX_QUAD and SPI_TX_OCTAL bits are not set, the default transfer bus width is single bit. Signed-off-by: Masahisa Kojima <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: bcmbca-hsspi: Add driver for newer HSSPI controllerWilliam Zhang
The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an updated SPI controller that add the capability to allow the driver to control chip select explicitly. Driver can control and keep cs low between the transfers natively. Hence the dummy cs workaround or prepend mode found in the bcm63xx-hsspi driver are no longer needed and this new driver is much cleaner. Port from linux patch: Link: https://lore.kernel.org/r/[email protected] Signed-off-by: William Zhang <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: bcm63xx-hsspi: Add prepend mode supportWilliam Zhang
Due to the controller limitation to keep the chip select low during the bus idle time between the transfer, a dummy cs workaround was used when this driver was first upstreamed to the u-boot based on linux kernel driver. It basically picks the dummy cs as !actual_cs so typically dummy cs is 1 when most of the case only cs 0 is used in the board design. Then invert the polarity of both cs and tell the controller to start the transfers using dummy cs. Assuming both cs are active low before the inversion, effectively this keeps dummy cs high and actual cs low during the transfer and workaround the issue. This workaround requires that dummy cs 1 pin to is set to SPI chip selection function in the pinmux when the transfer clock is above 25MHz. The old chips likely have default pinmux set to chip select on the dummy cs pin so it works but this is not case for the new Broadband BCA chips and this workaround stop working. This is specifically an issue to support SPI NAND and SPI NOR flash because these flash devices can typically run at or above 100MHz. This patch utilizes the prepend feature of the controller to combine the multiple transfers in the same message to a single transfer when possible. This way there is no need to keep clock low between transfers and solve the issue without any pinmux requirement. Multiple transfers within a SPI message may be combined into one transfer if the following are all true: * One or more half duplex write transfer in single bit mode * Optional full duplex read/write at the end * No delay and cs_change between transfers Most of the SPI device meets this requirements such as SPI NOR, SPI NAND flash, Broadcom SPI voice card and etc. So this change switches to the prepend mode as the default mode. For any SPI message that does not meet the above requirement, we switch to original dummy cs mode but limit the clock rate to the safe 25MHz. Port from linux patch: Link: https://lore.kernel.org/r/[email protected] Signed-off-by: William Zhang <[email protected]> Acked-by: Jagan Teki <[email protected]>
2023-07-13spi: bcm63xx-hsspi: Add new compatible string supportWilliam Zhang
New compatible string brcm,bcmbca-hsspi-v1.0 is introduced based on dts document brcm,bcm63xx-hsspi.yaml. Add it to the driver to support this new binding. Port from linux patch: Link: https://lore.kernel.org/r/[email protected] Signed-off-by: William Zhang <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: bcm63xx-hsspi: Fix multi-bit mode settingWilliam Zhang
Currently the driver always sets the controller to dual data bit mode for both tx and rx data in the profile mode control register even for single data bit transfer. Luckily the opcode is set correctly according to SPI transfer data bit width so it does not actually cause issues. This change fixes the problem by setting tx and rx data bit mode field correctly according to the actual SPI transfer tx and rx data bit width. Fixes: 29cc4368ad4b ("dm: spi: add BCM63xx HSSPI driver") Port from linux patch: Link: https://lore.kernel.org/r/[email protected] Signed-off-by: William Zhang <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: bcm63xx-hsspi: Make driver depend on BCMBCA archWilliam Zhang
ARCH_BCMBCA was introduced to cover individual Broadcom broadband SoC for common features and IP blocks. Use this config instead of each chip config as the Kconfig dependency for Broadcom HSSPI driver. Signed-off-by: William Zhang <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: pl022: Add chip-select gpio supportLukas Funke
Add support for an optional external chip-select gpio. Signed-off-by: Lukas Funke <[email protected]> Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: pl022: Remove platform data headerStefan Herbrechtsmeier
Remove the platform data header because its content is only used by the driver. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: pl022: Rename flush into pl022_spi_flushStefan Herbrechtsmeier
Rename the flush function into pl022_spi_flush to avoid conflicting types with previous declaration of the function in stdio.h header. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-07-13spi: pl022: Align compatible property with device tree bindingLukas Funke
Align the compatible property with the kernel device tree binding [1] by removing the '-spi' suffix. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/spi/spi-pl022.yaml Signed-off-by: Lukas Funke <[email protected]> Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2023-06-20drivers: spi: omap3_spi: Initialize mode for all channelsJulien Panis
At first SPI transfers, multiple chip selects can be enabled simultaneously. This is due to chip select polarity, which is not properly initialized for all channels. This patch fixes the issue. Signed-off-by: Julien Panis <[email protected]>
2023-06-12Merge tag 'xilinx-for-v2023.10-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2023.10-rc1 global: - Use proper U-Boot project name Fix sparse warnings in zynqmp-clk, zynqmp handoff, board cmd: - Cover incorrect 0 length entries Versal NET: - Add bootmode logic - Support SPP production version - Add loadpdi command ZynqMP: - Clear pmufw node command ID handling - Change power domain behavior around zynqmp_pmufw_node() - Fix zynqmp cmd return values and pmufw command - Fix R5 tcm init and modes mmc: - Sync Versal NET emmc DT binding pcie: - Add support for ZynqMP PCIe root port video: - Add support for ZynqMP DP tools: - Fix debug message in relocate-rela
2023-06-12Merge tag v2023.07-rc4 into nextTom Rini
Signed-off-by: Tom Rini <[email protected]>
2023-06-12global: Use proper project name U-BootMichal Simek
Use proper project name in comments, Kconfig, readmes. Reviewed-by: Neil Armstrong <[email protected]> Acked-by: Ilias Apalodimas <[email protected]> Reviewed-by: Stefan Roese <[email protected]> Reviewed-by: Qu Wenruo <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
2023-06-10mtd: spi: renesas: Add 4 bytes address mode supportCong Dang
This patch adds 4-byte address mode support. Because traditional access based on FIFO/shift register, it's complex to specify information like opcode, address length, dummy bytes etc to flash. Replace the traditional access by spi-mem layer which is essential to make 4-byte address mode support possible. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Cong Dang <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]>
2023-06-10mtd: spi: renesas: Add R-Car Gen4 supportHai Pham
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> [Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
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