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Bridge uses only one clock and enforcing name to be set may
cause issues in the future.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Simplify power supply request logic.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use OF graph parsing helpers to get linked panel.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
its user driver has bridge support.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
its user driver has bridge support.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use DSI message flag to set correct speed mode for message transfer.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch from PANEL_UCLASS to VIDEO_BRIDGE_UCLASS since now
Tegra DC driver has bridge support.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Establish the backlight as a DC display controller child.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Implement child binding helper within DC bind to support DC PWM backlight
feature.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Video operations are not required by the Tegra Display Controller
and should therefore be removed.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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If device uses native Tegra DSI or HDMI, DC clock MUST use the same
parent as DSI/HDMI clock uses. Hence remove need in device tree
configuration and satisfy this condition by default.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use OF graph as a main bridge/panel source, preserving
backwards compatibility with phandle implementation.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Rework existing DC driver configuration to support bridges (both external
and internal DSI and HDMI controllers) and align video devices chain logic
with Linux implementation. Additionally, this should improve communication
between DC and internal DSI/HDMI controllers.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Tegra platforms feature native HDMI support. Implement a driver to enable
functionality. This driver will initially support Tegra 2 and 3, with
future extensibility.
Co-developed-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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reset setup
Introduce a simplified HOST1X driver, limited to the basic clock and reset
initialization of the bus.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-tegra into next
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Add a simple and transparent LVDS de/encoder driver with a powerdown
gpio and a power supply.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add get_display_timing ops for internal bridges linked to
panels that do not support EDID (MIPI-DSI panels for example)
or have EDID not routed.
Tested-by: Dang Huynh <[email protected]> (PineTab 2)
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 1536x2048
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Add support for National Semiconductor/TI LP8550/1/2/3/5/6/7
LED Backlight. Driver is based on Linux version but is
reworked and optimised for U-Boot DM framework. Currently
only register driven backlight control is supported, PWM
driver backlight control may be added later if needed.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Re-design MIPI calibration driver to fit T124.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Tegra K1 is fully compatible with existing DC and DSI implementation
using Tegra 4 data.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Parametrize DSI configuration by passing DC source pipe. This
should resolve possible failure if second DC is used with DSI
for some reason.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use Linux DSI driver approach to calculate lanes for ganged mode.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Calculate packet parameters for video mode same way it is done or
command mode, by halving timings plugged into equations.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Move SOL delay calculation outside of video mode conditions.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Align U-Boot DSI ganged mode implementation with the Linux kernel's
implementation.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch to struct clk instead of working with plain clock id.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch to Linux-like approach of DSI panel binding as a DSI
controllers child node.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Mainly unification and improving of readability.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Since pinmux driver now is available for Tegra 2, these parts may
be removed from here and defined either in device tree or in
the device board files.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch to struct clk instead of working with plain clock id.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Simon Glass <[email protected]> says:
The current UPL spec[1] has been tidied up and improved over the last
year, since U-Boot's original UPL support was written.
This series includes some prerequisite patches needed for the real UPL
patches. It is split from [2]
[1] https://github.com/UniversalPayload/spec/tree/3f1450d
[2] https://patchwork.ozlabs.org/project/uboot/list/?series=438574&state=*
Link: https://lore.kernel.org/r/[email protected]
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Add this information to the handoff structure so that it is available to
U-Boot proper. Update bochs and the video handoff.
Signed-off-by: Simon Glass <[email protected]>
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In Kria SOM configuration DP is under reset and access to DP is causing
hang that's why call reset at probe to avoid this situation.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/0504474a91a9839828aecd37f8855fd154cdf2e1.1733742708.git.michal.simek@amd.com
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MTRR functionality is available only on x86, so this driver cannot be compiled
on other architectures. Fix this with preprocessor directives.
Signed-off-by: Yuri Zaporozhets <[email protected]>
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Fix compile warning with !CONFIG_FDT_64BIT by
casting the variable in the debug print.
Signed-off-by: Eva Kurchatova <[email protected]>
Reported-by: Leo Yu-Chi Liang <[email protected]>
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When starting a new text line, an assumption is made that the current
vertical position is a multiple of the character height. When this is
not true, characters can be written after the end of the framebuffer.
This can causes crashes and strange errors from QEMU.
Adjust the scrolling check when processing a newline character, to
avoid any problems.
Add some comments to make things a little clearer.
Signed-off-by: Simon Glass <[email protected]>
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This is useful for highlighting something with a black background, as
is needed with cedit when using a white-on-black console. Add this as
a new colour.
Signed-off-by: Simon Glass <[email protected]>
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If the regulator is already enabled, this happens if the regulator
is set in regulator-always-on, regulator_set_enable() return -EALREADY.
Ignore the -EALREADY return since it's not an error.
Suggested-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/20241009-u-boot-video-fix-hdmi-supply-already-on-v2-1-4478a28d1f49@linaro.org
Signed-off-by: Neil Armstrong <[email protected]>
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Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.
Signed-off-by: Tom Rini <[email protected]>
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This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 2560×1600
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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It seems that DECLARE_GLOBAL_DATA_PTR use is not needed and video system
works perfectly fine without it.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.
Update the comment in bootstage to refer to this symbol, instead of
SPL_
Signed-off-by: Simon Glass <[email protected]>
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Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.
Signed-off-by: Simon Glass <[email protected]>
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Rename this function to indicate that it refers to any xPL phase.
Signed-off-by: Simon Glass <[email protected]>
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This field is not used, so don't set it.
Signed-off-by: Simon Glass <[email protected]>
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This field is not used, so don't set it.
Signed-off-by: Simon Glass <[email protected]>
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