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Compiling the 'bmp' command with DM and having one of the following macros
enabled:
CONFIG_BMP_16BPP, CONFIG_BMP_24BPP ONFIG_BMP_32BPP
generates this error:
drivers/video/video_bmp.c: In function ‘video_bmp_display’:
drivers/video/video_bmp.c:315:22: error: ‘lcd_line_length’ undeclared (first use in this function)
fb -= width * 2 + lcd_line_length;
^
This patch moves to using the correct variable instead and enables the
'bmp' command for DM again.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Anatolij Gustschin <[email protected]>
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Fix the divider calculation logic to choose a value so that the
resulting baudrate is either equal to or closest possible baudrate less
than the requested value. While at that, cleanup ti_spi_set_speed().
Signed-off-by: Vignesh R <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Commit 5a49f17481bb ("net: mii: Use spatch to update miiphy_register")
updated the mvgbe implementation of smi_reg_read/smi_reg_write. Prior to
that change mvgbe_phy_read and mvgbe_phy_write where used as wrappers to
satisfy the phylib APIs. Because these functions weren't updated in that
commit build errors where triggered when CONFIG_PHYLIB was enabled.
Fix these build errors by removing mvgbe_phy_read and mvgbe_phy_write
and using smi_reg_read/smi_reg_write directly.
Signed-off-by: Chris Packham <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms
specified by the IEEE802.3 standard from the chip's default of 8ms.
For more details, see the "Auto-Negotiation Timing" section of the
KSZ9031RNX datasheet.
[1] https://patchwork.kernel.org/patch/6558371/
Signed-off-by: Ash Charles <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This driver supports the Synopsys Designware Ethernet QoS (Quality of
Service) a/k/a eqos IP block, which is a different design than the HW
supported by the existing designware.c driver. The IP supports many
options for bus type, clocking/reset structure, and feature list. This
driver currently supports the specific configuration used in NVIDIA's
Tegra186 chip, but should be extensible to other combinations quite
easily, as explained in the source.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]> # V1
Acked-by: Joe Hershberger <[email protected]>
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Signed-off-by: Patrick Delaunay <[email protected]>
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Cover-Letter: Fixes several spelling errors for the words "resetting",
"extended", "occur", and "multiple".
Signed-off-by: Vagrant Cascadian <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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clk_rk3399 is driver name, not device name
Signed-off-by: Jacob Chen <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]
Signed-off-by: Amit Singh Tomar <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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CONFIG_SUNXI -> CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt
Cc: Simon Glass <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Hans de Goede <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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OHCI has a known limitation of allowing only 32-bit DMA buffer
addresses, so we have a lot of u32 variables around, which are assigned
to pointers and vice versa. This obviously creates issues with 64-bit
systems, so the compiler complains here and there.
To allow compilation for 64-bit boards which use only memory below 4GB
anyway (and to avoid more invasive fixes), adjust some casts and types
and assume that the EDs and TDs are all located in the lower 4GB.
This fixes compilation of the OHCI driver for the Pine64.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
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Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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Add support to enable an early debug UART for debugging.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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Add ATMEL_USART option to support to enable the Atmel usart driver
from Kconfig.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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Due to the peripheral and generated clock driver improvement,
remove the unnecessary clock calling.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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Change the error return value -ENODEV from to -EINVAL for more
reasonable.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.
Signed-off-by: Wenyou Yang <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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In order to make clk->dev available in ops->of_xlate() to get the
clock ID from the 'reg' property of the clock node, assign the
clk->dev before calling ops->of_xlate().
Signed-off-by: Wenyou Yang <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
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The at91-pmc and at91-sckc aren't the clock providers, change their
class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't
need to bind the child nodes explicitly, the .post_bind callback
of simple_bus uclass will do it for them.
Signed-off-by: Wenyou Yang <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
Conflicts:
common/Kconfig
configs/dms-ba16_defconfig
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Introduce CONFIG_PCI_PNP in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
[trini: Re-generate configs and include/configs/ changes]
Signed-off-by: Tom Rini <[email protected]>
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Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.
This adds the missing fields in the driver declaration.
Signed-off-by: Sylvain Lesne <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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To prevent the wrong value check the SD version.
Signed-off-by: Jaehoon Chung <[email protected]>
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If vmmc didn't supply, we didn't know which card didn't supply vmmc.
And changed from "put" to "debug".
Signed-off-by: Jaehoon Chung <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.
This adds the missing fields in the driver declaration.
Signed-off-by: Sylvain Lesne <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Drop unneeded variables and assignments.
Signed-off-by: Masahiro Yamada <[email protected]>
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This pathc is fixed the below thing.
If misaligned the cache range, Just flush to CACHLINE_SIZE.
"CACHE: Misaligned operation at range [7ae55b00, 7ae55b08]"
Signed-off-by: Jaehoon Chung <[email protected]>
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In device tree, there is vmmc-supply property for SD/MMC.
Introduce mmc_power_init function to handle vmmc-supply.
mmc_power_init will first invoke board_mmc_power_init to
avoid break boards which already implement board_mmc_power_init.
If DM_MMC and DM_REGULATOR is defined, the regulator
will be enabled to power up the device.
Signed-off-by: Peng Fan <[email protected]>
Cc: Jaehoon Chung <[email protected]>
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Add 'PCI' as a menu option and migrate all existing users.
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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To enable configuration of sdr.ctrlcfg.extratime1 register which enable
extra clocks for read to write command timing. This is critical to
ensure successful LPDDR2 interface
Signed-off-by: Chin Liang See <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
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No need to use a wrapper that is equivalent to xhci_deregister().
Signed-off-by: Masahiro Yamada <[email protected]>
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This driver was recently converted to Driver Model, so missed the
subsystem-wide cleanups by commit 405273427366 ("usb: replace
ehci_*_remove() with usb_deregister()").
Signed-off-by: Masahiro Yamada <[email protected]>
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Added kconfig for NAND_MXS driver.
Cc: Scott Wood <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Added kconfig for FEC_MXC driver.
Cc: Joe Hershberger <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Added kconfig for IMX_THERMAL driver.
Cc: Simon Glass <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Added kconfig for MXC_UART driver.
Cc: Simon Glass <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Make sure the driver writes the cmd_data register only once per
read transfer instead of doing so potentially repeatedly.
In case the read transfer didn't finish quickly enough, the loop
in the driver code would spin fast enough to write the same value
into the cmd_data register again before re-checking whether the
transfer completed, which would cause another spurious read transfer
on the bus.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Alexey Brodkin <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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