| Age | Commit message (Collapse) | Author |
|---|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
|
|
Enable watchdog0 so the DesignWare watchdog can be probed and serviced
by U-Boot. Matches the existing Stratix 10 SoCDK enablement.
Signed-off-by: Dinesh Maniyam <[email protected]>
|
|
The NanoPi Zero2 has one USB 2.0 Type-A HOST port and one USB 2.0 Type-C
OTG port.
Add support for using the USB 2.0 ports on NanoPi Zero2.
Signed-off-by: Jonas Karlman <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patch.msgid.link/[email protected]
[ upstream commit: ff660109f4129a13bbdc31bc14ca233ebf0c9450 ]
(cherry picked from commit 2f28b83dd0d59cddb15927dbf30eb6960fbf772d)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
|
|
The ArmSoM Sige1 has two USB 2.0 Type-A HOST ports behind an onboard
USB hub, and one USB 2.0 Type-C OTG port.
Add support for using the USB 2.0 ports on ArmSoM Sige1.
The onboard USB hub handles OHCI so only the EHCI controller is enabled.
Signed-off-by: Jonas Karlman <[email protected]>
[added phy-supply for otg port]
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patch.msgid.link/[email protected]
[ upstream commit: b6b74087f90a201cfdd6da6a43e7b92dba8370e3 ]
(cherry picked from commit 959d0d70460b569e212c0daa70404b794cbcd37c)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
|
|
The ROCK 2A has three USB 2.0 Type-A HOST ports behind an onboard
USB hub, and one USB 3.0 Type-A port.
And the ROCK 2F has two USB 2.0 Type-A HOST ports behind an onboard
USB hub, and one USB 2.0 Type-C OTG port.
Add support for using the USB ports on Radxa ROCK 2A/2F.
The onboard USB hub handles OHCI so only the EHCI controller is enabled.
Signed-off-by: Jonas Karlman <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patch.msgid.link/[email protected]
[ upstream commit: 4e55d52f5f3b333a9ff5103099df97291aaeb083 ]
(cherry picked from commit dd0101f77912adbf6ed95168a215f4eeceebf241)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
|
|
The Radxa E20C has one USB2.0 Type-A HOST port and one USB2.0 Type-C port.
The Type-C port is conneced to a FE1.1s_QFN USB hub on the board, with its
ports being connected to the XHCI usb controller and an usb-uart bridge.
This also means, the XHCI controller can only be used in device-mode.
Add support for using the USB 2.0 ports on Radxa E20C.
Signed-off-by: Jonas Karlman <[email protected]>
[set xhci to peripheral and add comment about the outward-facing hub]
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patch.msgid.link/[email protected]
[ upstream commit: e897bcf81dd920bf80ace6d98ec6f9645c5b50f2 ]
(cherry picked from commit 2e01d9a6eb75fa4c704e421e766b2715000d1a29)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Rockchip RK3528 has one USB 3.0 DWC3 controller and oneUSB 2.0 EHCI/OHCI
controller and uses an Innosilicon-USB2PHY for USB 2.0. The DWC3
controller additionally uses the Naneng Combo PHY for USB3.
Add device tree nodes to describe these USB controllers along with the
USB 2.0 PHYs.
[moved snps,dis_u2_susphy_quirk here from individual boards,
describe both usb2+3 default phy connections, usb2 boards can override]
Signed-off-by: Jonas Karlman <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patch.msgid.link/[email protected]
[ upstream commit: 5f3ae9b12a6c523992a7216bbc4420ac33450b79 ]
(cherry picked from commit 7793aab344678ac6b9fe039d01ff0c1106bc8b0d)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Add the node describing the watchdog on the RK3528 SoC.
Signed-off-by: Jonas Karlman <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patch.msgid.link/[email protected]
[ upstream commit: eb24b60553e0692cbbec2863ca31d2a56bff098d ]
(cherry picked from commit 87fa1af25f01c71bd8cfc51920b3a6d51d38abe5)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Add CONFIG_SPL_OF_LIVE and if set, initialize of_live in spl.c
Signed-off-by: Michael Srba <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
|
|
|
|
Fix the incorrect use of 'your' instead of 'you are' and reflow the text
around it.
Fixes: af9e6ad4ab29 ("board_f: Add new function to allow runtime DTB selection")
Signed-off-by: Andrew Goodbody <[email protected]>
|
|
Restyle all Kconfigs for "dts":
Menu entries : no space left
Menu attributes: 1 TAB
Help text : 1 TAB + 2 spaces
Replace '---help---' by 'help'
Signed-off-by: Johan Jonker <[email protected]>
|
|
Change the regulator-name properties to be unique for all regulators.
U-Boot cannot handle duplicate names.
Signed-off-by: David Lechner <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
[ upstream commit: d91639d0ab3223b61c00442021dc639c9ddc2b76 ]
(cherry picked from commit 22ce1d7d45a696128b8ad2cb9fbc4f2073bcb4f6)
Reviewed-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/20260611-mtk-pick-dt-mt6359-unique-names-v1-1-601546be1210@baylibre.com
Signed-off-by: David Lechner <[email protected]>
|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
- Remove netc_timerX nodes from arch/arm/dts/imx943-u-boot.dtsi as they
are now upstream
- Move dts/upstream/include/dt-bindings/reset/bcm6318-reset.h to
include/dt-bindings/reset/bcm6318-reset.h as upstream has removed this
file as unused (but we use it).
Signed-off-by: Tom Rini <[email protected]>
|
|
Add configuration for ARMv8-M aarch32 core, which are currently
Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
cores, except the code has to be compiled with matching compiler
-march=armv8-m.main flag . These cores have no MMU, they have MPU,
which is currently not configured.
Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
initialization code is built from arch/arm/cpu/armv7m and not armv8.
Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices
using these cores do come from arch/arm64/boot/dts.
To avoid excess duplication in Makefiles, introduce one new Kconfig
symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M
cores.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Udit Kumar <[email protected]>
|
|
The TPL_OF_CONTROL option can only select TPL_OF_LIBFDT functionality if
we also have enabled TPL_LIBGENERIC_SUPPORT, so express this dependency
in Kconfig.
Signed-off-by: Tom Rini <[email protected]>
|
|
Our sandbox platform are not appropriate for OF_UPSTREAM, reflect this in
Kconfig.
Signed-off-by: Tom Rini <[email protected]>
|
|
Add i.MX952 EVK basic device tree, with UART1, SDHC[1,2] supported.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
[ upstream commit: a5aa8551d0046ec701e8962f83361165ccf640a4 ]
(cherry picked from commit bf18a0f083bdf73f806a3afb9b606b2cb0fcafb3)
|
|
i.MX952 is designed for AI-powered sensor fusion and vision sensing
applications, it features 4 Corte-A55, 1 Cortex-M33, 1 Cortex-M7 and
NXP eIQ NPU and advanced graphics, video and advanced security with
edgelock. Product info could be found at:
https://www.nxp.com/products/i.MX-952
The basic device tree includes:
- clock, pin, power header files
- device nodes: CPU[0-3], SCMI firmware, Interrupt Controller, Sys counter,
eDMA, MU, SPI, UART, I2C, USB and etc
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
[ upstream commit: b516a4dd6a1ff7ddbaf3ab30ddec88088a6ec9e6 ]
(cherry picked from commit 3546aa155a84b8af636d44c852c864845e654864)
|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
|
|
When building Exynos boards, configure OF_UPSTREAM_VENDOR to build all
device trees in:
- "samsung/" for 32-bit ARM platforms.
- "exynos/" for 64-bit ARM platforms.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Our last sync with the kernel was 5.1.
We are so out of sync now, that tracking the patches and backporting
them one by one makes little sense and it's going to take ages.
This is an attempt to sync up Makefiles to 6.1.
Unfortunately due to sheer amount of patches this is not easy to review,
but that's what we decided during a community call for the bump to 5.1,
so we are following the same guidelines here.
Signed-off-by: Sughosh Ganu <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>a #rebased on -next
|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
|
|
Support for using "u-boot,dm-..." rather than "bootph-..." has been
deprecated since February 2023. Any platforms using this have had a
console message saying to migrate by 2023.07. Go and remove all support
here now, for the v2026.01 release.
The results of this change that aren't clear from the above are that we
still have a checkpatch.pl error message, and document in
doc/develop/spl.rst that they have been migrated since 2023. We also
change the key2dtsi.py tool to use the correct bootph phase rather than
the legacy phase.
Signed-off-by: Tom Rini <[email protected]>
|
|
Anshul Dalal <[email protected]> says:
This patch series adds support for AM6254atl SiP (or AM62x SiP for
short) to U-Boot.
The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]:
AM6254atl
||||
|||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4)
||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores)
|+---- Silicon PG Revision (A indicates SR 1.0)
+----- Core configuration (4 indicates A53's in Quad core config)
AM62x SiP provides the existing AM62x SoC with 512MiB of DDR
integrated in a single packages. The first 4 patches in the series
are cherry-picked from the devicetree-rebasing repository at
'v6.18-rc2-dts'.
Link: https://lore.kernel.org/r/[email protected]
|
|
This patch adds the dt for SK-AM62-SIP, which uses the existing
SK-AM62 board design with the new AM6254atl SiP. This changes the
location of memory node from the board dts to SoC level dtsi
(k3-am6254atl in our case).
Therefore this patch introduces the new 'k3-am625-sk-common.dtsi'
which represents the common hardware used for both 'am625-sk' and
'am6254atl-sk' boards with the inheritance hierarchy modified to:
k3-am625-sk.dts:
k3-am62 k3-am62x-sk-common
| |
k3-am625 k3-am625-sk-common
| |
+-----+------+
|
k3-am625-sk
k3-am6254atl-sk.dts:
k3-am62
|
k3-am625 k3-am62x-sk-common
| |
k3-am6254atl k3-am625-sk-common
| |
+-------+--------+
|
k3-am6254atl-sk
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: 2517e476b819df986fa1fe53927c099032bb72dc ]
(cherry picked from commit 58cd89aff167661dbae0c9911282ea3f1b8212cc)
|
|
This patch adds the top level dtsi for AM6254atl SiP which integrates
the existing AM625 SoC with 512MiB of DDR in a single package.
More information about the package can be found here:
https://www.ti.com/lit/ds/symlink/am625sip.pdf
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: 7c1d13a14e61ab33eec330cb6cabbddb37eecaa9 ]
(cherry picked from commit fa5a6a6e784bde78c6ec74eccd92d51fb9fd49e8)
|
|
The k3-am62x-sk-common dtsi represents the common hardware used across
am62x EVMs which can be configured with various DDR sizes or none (with
DDR integrated in the package) based on the specific am62x SoC used.
Therefore this patch moves the memory node and the SoC specific k3-am625
dtsi out of sk-common and into the board dts files. No functional change
is intended from this patch. The device-tree inheritance is changed as
follows:
Before:
k3-am62
^
k3-am625
^
k3-am62x-sk-common
^
am62x EVMs (k3-am625-sk, k3-am62-lp-sk)
After:
k3-am62
^
k3-am625 k3-am62x-sk-common
^ ^
am62x EVMs (k3-am625-sk, k3-am62-lp-sk)
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: e0b9feca7329c495a76891d7766a781dea73787d ]
(cherry picked from commit 0b0edbbdf43bac6b28dd59c88647bd5e0b73ffea)
|
|
Add the label name 'reserved_memory' to the reserved-memory node in all
K3 AM6* board level dts files. This is done so that the node can be
referenced and extended to add more carveout entries as needed in future
refactoring patches.
Signed-off-by: Beleswar Padhi <[email protected]>
Acked-by: Andrew Davis <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: 4f1aee4723a796a92f17b23699dc861b582ddfd2 ]
(cherry picked from commit 58c447fe500d78f5adc373b4945d8317e11df072)
|
|
The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.
Add initial device tree for the ArmSoM Sige1 board.
Signed-off-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 1c6b12ef9575bc18dad2393e50ca1ebf96f0a0c8 ]
(cherry picked from commit 3ba04aa78ba71faab4a339f5ab15bc81a3e0a51b)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
The ROCK 2A and ROCK 2F is a high-performance single board computer
developed by Radxa, based on the Rockchip RK3528A SoC.
Add initial device tree for the Radxa ROCK 2A and ROCK 2F boards.
Signed-off-by: Jonas Karlman <[email protected]>
Tested-by: Yao Zi <[email protected]>
Reviewed-by: Nicolas Frattaroli <[email protected]>
Tested-by: Nicolas Frattaroli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 5b71b3d9aa61626d6a93ed2f761a748aa2ecfa95 ]
(cherry picked from commit d272bc0c747a5af49cf98140ebd25a702f84ab52)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Milk-V Mars CM Lite is a System-on-Module based on the Milk-V Mars CM
without the onboard eMMC storage component populated and configured
instead for SD3.0 Card Slot on that interface via 100-pin connector.
Link to Milk-V Mars CM Lite schematics: https://github.com/milkv-mars/mars-files/tree/main/Mars-CM_Hardware_Schematices
Link to StarFive JH7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/index.html
Link to Raspberry Pi CM4IO datasheet: https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf
Add the devicetree file to make use of StarFive JH7110 common supported
features PMIC, EEPROM, UART, I2C, GPIO, PCIe, QSPI Flash, PWM, and
Ethernet. Also configure the eMMC interface mmc0 for SD Card use and
configure the common SD Card interface mmc1 for onboard SDIO BT+WiFi.
Signed-off-by: E Shattow <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 4cce8b2503ab50f75a2dbc3eef2e55722836588e ]
(cherry picked from commit c7821d537e5a61e5d543588674b71fb43ec0665b)
|
|
Add "milkv,marscm-lite" as a StarFive JH7110 SoC-based system-on-module.
Signed-off-by: E Shattow <[email protected]>
Acked-by: Rob Herring (Arm) <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 12a29108384cfe073a4de778d5207d53b492f85e ]
(cherry picked from commit ae7213970a0c80e90fac9ff0d2aa2966655983f5)
|
|
Milk-V Mars CM is a System-on-Module based on the StarFive VisionFive 2
board and Radxa CM3 System-on-Module compatible with the Raspberry Pi
CM4IO Classic IO Board.
Mars CM SoM features:
- StarFive JH7110 System on Chip with RV64GC up to 1.5GHz
- AXP15060 Power Management Unit
- LPDDR4 2GB / 4GB / 8GB DRAM memory
- BL24C04F 4K bits (512 x 8) EEPROM
- GigaDevice 25LQ128EWIG QSPI NOR Flash 16M or SoC ROM UART loader for
boot (selectable by GPIO)
- eMMC5.0 8GB / 16GB / 32GB flash storage onboard
- AP6256 via SDIO 2.0 onboard wireless connectivity WiFi 5 + Bluetooth
5.2 (optional, present in models with WiFi feature)
- 1x Motorcomm YT8531C Gigabit Ethernet PHY
- IMG BXE-4-32 Integrated GPU with 3D Acceleration:
- H.264 & H.265 4K@60fps Decoding
- H.265 1080p@30fps Encoding
- JPEG encoder / decoder
Additional features available via 2x 100-pin connectors for CM4IO Board:
- 1x HDMI 2.0
- 1x MIPI DSI (4-lanes)
- 1x 2CH Audio out (via GPIO)
- 1x MIPI CSI (2x2-lanes or 1x4-lanes)
- 1x USB 2.0
- 1x PCIe 1-lane Host, Gen 2 (5Gbps)
- Up to 28x GPIO, supporting 3.3V
- UART x6
- PWM x8
- I2C x7
- SPI
- I2S
Link to Milk-V Mars CM schematics: https://github.com/milkv-mars/mars-files/tree/main/Mars-CM_Hardware_Schematices
Link to StarFive JH7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/index.html
Link to Raspberry Pi CM4IO datasheet: https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf
Add the devicetree file to make use of StarFive JH7110 common supported
features PMIC, EEPROM, UART, I2C, GPIO, eMMC, PCIe, QSPI Flash, PWM, and
Ethernet. Also configure the common SD Card interface mmc1 for onboard
SDIO BT+WiFi.
Signed-off-by: E Shattow <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 8d193bc0aa2e802be30de331317639482735d738 ]
(cherry picked from commit 8e935d097e975e6322b63fdc8ef9894c8582bef0)
|
|
Add "milkv,marscm-emmc" as a StarFive JH7110 SoC-based system-on-module.
Signed-off-by: E Shattow <[email protected]>
Acked-by: Rob Herring (Arm) <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: d1829e0b2f0619c39b0ce0b84fcbf67569108376 ]
(cherry picked from commit 4df5d2ff67fa10ad1ba5760dedf1b3cbc2037739)
|
|
Add a common board dtsi for use by Milk-V Mars CM and Milk-V Mars CM Lite.
Signed-off-by: E Shattow <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 651b30c58775e334c79aa3ecd44a3d98ac201db2 ]
(cherry picked from commit 034af14dcd1e6dbfa4f41a340b6d92b054604858)
|
|
Drop post-power-on-delay-ms from mmc0 mmc1 interfaces. There is no
known reason for these properties to continue, testing appears to be fine
without them [1].
1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/
Signed-off-by: E Shattow <[email protected]>
Tested-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: b5a861a438d1a456952665cf6167969f01209479 ]
(cherry picked from commit 9c18e97b9be437c97789c9687148f3dd3f25b809)
|
|
Relax no-mmc restriction on mmc1 for jh7110 boards. The restriction is
only needed to block use of commands that would cause a device to
malfunction, which by testing and observation [1] is not any problem.
1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/
Signed-off-by: E Shattow <[email protected]>
Tested-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 08128670a931a4117f7b93c703d0186c67c9e1e2 ]
(cherry picked from commit cd5d4277d9515be5c10752fd8140f03c3dfec541)
|
|
Add bootph-pre-ram hinting to jh7110.dtsi:
- CPU interrupt controller(s)
- gmac1_rgmii_rxin fixed-clock (dependency of syscrg)
- gmac1_rmii_refin fixed-clock (dependency of syscrg)
- oscillator
- core local interrupt timer
- syscrg clock-controller
- pllclk clock-controller (dependency of syscrg)
- DDR memory controller
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 8181cc2f3f21657392da912eb20ee17514c87828 ]
(cherry picked from commit a31c1c85876bf9f15f3df14959354ab9a200ffa0)
|
|
Add JH7110 SoC DDR external memory controller.
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 7114969021ec5c4c0f3df1da3a8790f75dda92e2 ]
(cherry picked from commit 8d5c520b73b7c29b714f75e99ed48baa55fc5fa1)
|
|
Relax no-sdio restriction on mmc1 for jh7110 boards. Property was
introduced for StarFive VisionFive2 dts to configure mmc1 for SD Card
but this is not necessary, the restriction is only needed to block use of
commands that would cause a device to malfunction.
Signed-off-by: E Shattow <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ upstream commit: 481ee0fcbb9a0f0706d6d29de9570d1048aff631 ]
(cherry picked from commit b4e73596622f791e3c2a2449022671e4e579fbd0)
|
|
As part of building with "allyesconfig" we need to have the correct
default value for the sandbox architecture provided here.
Signed-off-by: Tom Rini <[email protected]>
|
|
We have a large number of library symbols that should not be prompted
for by the user really but rather selected by the platform (or SoC) as
needed. To start with however, make these depend on !COMPILE_TEST.
Signed-off-by: Tom Rini <[email protected]>
|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
|
|
Update documents 'README.fdt-control' reference to replacement 'control.rst':
doc/arch/nios2.rst
dts/Makefile
Also convert some adjacent pathname mentions to rST links where applicable
Fixes: 3e9fddfc4f14 "doc: Move devicetree control doc to rST"
Signed-off-by: E Shattow <[email protected]>
|
|
The bootloader for RK3588 Tiger currently forces the PMIC reset behavior
(stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC) to 0b1X
which is incorrect for our devices.
It is required to restart the PMU as otherwise the companion
microcontroller cannot detect the PMIC (and by extension the full
product and main SoC) being rebooted which is an issue as that is used
to reset a few things like the PWM beeper and watchdogs.
Let's add the new rockchip,reset-mode property to make sure the PMIC
reset behavior is the expected one.
Signed-off-by: Quentin Schulz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: e82f642b9821384045915dc30e73df7de8424827 ]
(cherry picked from commit d9c568906be166834f4f977bc7f704176bac5b8a)
Reviewed-by: Kever Yang <[email protected]>
|
|
The bootloader for RK3588 Jaguar currently forces the PMIC reset
behavior (stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC)
to 0b1X which is incorrect for our devices.
It is required to restart the PMU as otherwise the companion
microcontroller cannot detect the PMIC (and by extension the full
product and main SoC) being rebooted which is an issue as that is used
to reset a few things like the PWM beeper and watchdogs.
Let's add the new rockchip,reset-mode property to make sure the PMIC
reset behavior is the expected one.
Signed-off-by: Quentin Schulz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: ee907113430aa02a8202c91bb574c385ecc28aa2 ]
(cherry picked from commit 8bd14566b75f9409de703a0d2f9a0704b71a7ebe)
Reviewed-by: Kever Yang <[email protected]>
|
|
To make it easier to read the device tree, let's add constants for the
rockchip,reset-mode property values that are currently only applicable
to RK806 PMIC.
Signed-off-by: Quentin Schulz <[email protected]>
[dt-maintainers did not consider this part of the binding, so we're
keeping the header in the devicetree directory]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 304be20e65ca08fc2e9cb58eb939a0054d8a8b81 ]
(cherry picked from commit 0e417bfcbc385c127c7f5ea01df6289aed8325c2)
Reviewed-by: Kever Yang <[email protected]>
|
|
The RK806 PMIC allows to configure its reset/restart behavior whenever
the PMIC is reset either programmatically or via some external pins
(e.g. PWRCTRL or RESETB).
The following modes exist:
- 0; restart PMU,
- 1; reset all power off reset registers and force state to switch to
ACTIVE mode,
- 2; same as mode 1 and also pull RESETB pin down for 5ms,
For example, some hardware may require a full restart (mode 0) in order
to function properly as regulators are shortly interrupted in this mode.
This is the case for RK3588 Jaguar and RK3588 Tiger which have a
companion microcontroller running on an independent power supply and
monitoring the PMIC power rail to know the state of the main system.
When it detects a restart, it resets its own IPs exposed to the main
system as if to simulate its own reset. Failing to perform this fake
reset of the microcontroller may break things (e.g. watchdog not
automatically disabled, buzzer still running until manually disabled,
leftover configuration from previous main system state, etc...).
Some other systems may be depending on the power rails to not be
interrupted even for a small amount of time[1].
This allows to specify how the PMIC should perform on the hardware level
and may differ between hardware designs, so a DT property seems
warranted. I unfortunately do not see how this could be made generic
enough to make it a non-vendor property.
[1] https://lore.kernel.org/linux-rockchip/2577051.irdbgypaU6@workhorse/
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: "Rob Herring (Arm)" <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lee Jones <[email protected]>
[ upstream commit: 404005d1083997daec7236620b9ba14bccdce449 ]
(cherry picked from commit 8ee72356e9844265334fd344bc05139d1f615c4d)
Reviewed-by: Kever Yang <[email protected]>
|
