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The status prop is typically the last prop.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <[email protected]>
Signed-off-by: Tianling Shen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 17e150fdd983c7e59b9240e34a166285f3c3fb39 ]
Signed-off-by: Tianling Shen <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Replace deprecated snps,reset props and move them to the PHY node.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <[email protected]>
Signed-off-by: Tianling Shen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 82b2868937883b65732da498b26366d34db61510 ]
Signed-off-by: Tianling Shen <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Use the marketing name for model name, this matches the dt-binding.
Also update the website url in copyright.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <[email protected]>
Signed-off-by: Tianling Shen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: b5bf84206a5c77528f9dd4cbca4e72caa063c102 ]
Signed-off-by: Tianling Shen <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps
Ethernet ports designed and developed by FriendlyElec for IoT
applications.
Specification:
- Rockchip RK3566
- 2GB LPDDR4X RAM
- optional 32GB eMMC module
- SD card slot
- 2x 1000 Base-T
- 3x LEDs (POWER, LAN, WAN)
- 2x Buttons (Reset, MaskROM)
- 1x USB 3.0 Port
- Type-C 5V 2A Power
Signed-off-by: Tianling Shen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 50decd493c8394c52d04561fe4ede34df27a46ba ]
Signed-off-by: Tianling Shen <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
Based on what "git diff" suggests, rename a device tree for
imx8mm_venice_defconfig and imx8mp_venice_defconfig
Signed-off-by: Tom Rini <[email protected]>
---
Cc: Tim Harvey <[email protected]>
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For new PowerPC developments, it will be useful to borrow devicetrees
from Linux. This patch makes it possible.
Signed-off-by: J. Neuschäfer <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
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Prepare v2025.01-rc4
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Add the i.MX91 device tree from [1]. These files could be synced
to linux upstream after [1] merged to linux source tree.
[1]
https://lore.kernel.org/all/[email protected]/
Signed-off-by: Peng Fan <[email protected]>
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i.MX91 is a derived from i.MX93, and most clocks could be reused from
i.MX93. Also Update imx93-clock.h to sync with linux next.
Signed-off-by: Peng Fan <[email protected]>
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While I had thought this commit was a cherry-pick from upstream, it is
not. And so, this is not allowed here.
This reverts commit dfe5f16a33453b742a66cabc8ea9a52a33279810.
Signed-off-by: Tom Rini <[email protected]>
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OSPI boot is broken due to missing bootph property
in pin mux of OSPI.
So add bootph to fix OSPI boot.
Signed-off-by: Udit Kumar <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/23280
- Add board:
rk3328: FriendlyElec NanoPi R2S Plus
rk3568: Qnap TS433
rk3588: Cool Pi CM5 GenBook
- Move rk3399_force_power_on_reset to TPL for puma board;
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The R2S Plus is basically an R2S with additional eMMC.
The eMMC configuration for the DTS has been extracted and copied from
rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
repository.
Signed-off-by: Sergey Bostandzhyan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: b8c02878292200ebb5b4a8cfc9dbf227327908bd ]
(cherry picked from commit c9bf98827964441f4dd16faa45bd4046f472e693)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Cool Pi CM5 GenBook works as a carrier board connect with CM5 [0].
Specification:
- Rockchip RK3588
- LPDDR5X 8/32 GB
- eMMC 64 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for RTL8852BE Wireless connection
- PCIE M.2 M Key for NVME connection
- eDP panel with 1920x1080
This patch add basic support to bringup eMMC/USB HOST/WiFi/TouchPad/
Battery/PCIE NVME, and can also drive a HDMI output with out of tree
hdmi patches.
[0] https://www.crowdsupply.com/shenzhen-tianmao-technology-co-ltd/genbook-rk3588
Signed-off-by: Andy Yan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 4a8c1161b843c366776fc872a6fe45b743b2983e ]
(cherry picked from commit dc6316da23734d9321e09f8c8a7669f4b4cb9f75)
Reviewed-by: Kever Yang <[email protected]>
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Add support for the DH electronics i.MX6DL DHCOM SoM and a PDK2 evaluation
board. The evaluation board features three serial ports, USB OTG, USB host
with an USB hub, Fast or Gigabit ethernet, eMMC, uSD, SD, analog audio,
PCIe and HDMI video output.
All of the aforementioned features except for mSATA are supported, mSATA
is not available on i.MX6DL and is only available on DHCOM populated with
i.MX6Q SoC which is already supported upstream.
Backport from linux-next commit
c3f5d76a6e03 ("ARM: dts: imx6dl: Add support for i.MX6DL DHCOM SoM on PDK2 carrier board")
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Christoph Niedermaier <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The device contains two i2c-connected eeproms holding some product-
specific values. One sitting on the mainboard and one on the statically
connected backplane.
While the eeprom chips themself have a size of 512 byte, the eeprom data
only uses 256 byte each, probably to stay compatible with other models.
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: da6f4130234448122fe3e66c8116f7d9eea8a5c7 ]
(cherry picked from commit 0b3109708caf5002ba188ae28eae9ce46b2c39b4)
Reviewed-by: Kever Yang <[email protected]>
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Contrary to the vendor-kernel the pmu-io-domains are not enabled by
default. This resulted in the value not being set according to the
regulator, which in turn made the gmac0 interface that is connected
to the vccio4 supply inoperable.
Fixes: 64b7f16fb394 ("arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433")
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 40cc4257169712f0ae3835820a4c5afbdd1a16ff ]
(cherry picked from commit f509fcb1fb82117e551b489592ac5714a6c5cd8d)
Reviewed-by: Kever Yang <[email protected]>
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While it requires to have the right phy driver loaded (i.e. motorcomm)
to make the phy asserting the right delays, this is generally the
preferred way to define the MAC <-> PHY connection.
Signed-off-by: Uwe Kleine-König <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: e8d45544f806f3b55c30345de84262cbb9504902 ]
(cherry picked from commit e0bbe061fd537bd7b113c53eb046bbcbf0e6597d)
Reviewed-by: Kever Yang <[email protected]>
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Add the two supplies for the pmu-io-domains that are defined in the
vendor devicetree for the TS433.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 64b7f16fb3947e5d08d9e9b860ce966250e45d52 ]
(cherry picked from commit 9b4d4c02b5762196063ab03c5439f96cbbaf2485)
Reviewed-by: Kever Yang <[email protected]>
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The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.
So there is no reason not to enable it.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 9130eb62586f4cef0557d0378fb7e78d7397ab2d ]
(cherry picked from commit e324a9e8ea083ebdca207b5ca2ed86d2b5f862a0)
Reviewed-by: Kever Yang <[email protected]>
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Fill in the missing pieces for RK809 pmic used on the TS433.
The regulator setup comes from the vendor-devicetree, so without proper
schematics its accuracy is somewhat unclear, but it looks really similar
to all the other rk3568 boards, so follows the reference design it seems.
The one caveat is related to vcc3v3_sd. This regulator needs to stay on.
When turned off because of no users, access to both PCIe controllers
will stall. Maybe this rail does supply the 100MHz refclk generation
or so.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: ee078c7daa98353496410b715a5acbb41d7d3a90 ]
(cherry picked from commit 48951cb085998a5c8e3650351a794b136dac648f)
Reviewed-by: Kever Yang <[email protected]>
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The TS433 seems to use a silergy,syr827 regulator for the cpu supply.
At least that is the compatible used in the vendor devicetree, though
it could very well also be another fan53555 clone.
Define the needed regulator node and hook up the cpu-supply to the
cpu cores.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 99b36ba910d896bddbb9a190ca686c6d9cd0325f ]
(cherry picked from commit 2f0afd1a3cbf6f3192dc7a5c496affab718671b3)
Reviewed-by: Kever Yang <[email protected]>
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The TS433 has 3 buttons, power and copy in the front as well as a reset
pinhole button on the back. The power-button is connected to the embedded
controller while the other two buttons are just gpio connected.
Add the gpio-keys definition for the two buttons we can handle right now.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 9b682d31b24f1f70b5b4d0618095d46e0722b9d8 ]
(cherry picked from commit f0b858c751382ee9faf18f9b19b0817c6b50ac1c)
Reviewed-by: Kever Yang <[email protected]>
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Enable the tsadc node to allow for temperature measurements of the soc.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 2dfdddd9d20306fd0d04b88fcbbf36d76fb67f11 ]
(cherry picked from commit d33949501abd1145ea572b605844f0ef4247478d)
Reviewed-by: Kever Yang <[email protected]>
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Add the 4 gpio-controlled LEDs to the Qnap-TS433.
They are meant for individual disk activitivy, but I haven't found a
way for how to connect them to their individual sata slot yet.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: ea91aabf18bcad6f5eceae6848ea6570ea61f126 ]
(cherry picked from commit 5a11b1bb40ac7b39e04077c045c3e3409fa352e2)
Reviewed-by: Kever Yang <[email protected]>
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Add the aliases for the internal network interface as well as the emmc
on the board and make sure the dedicated RTC is always the first one.
The TS433 actually has two rtc devices. One coming from the rk809 pmic
without added functionality and also a dedicated RTC from Mycrocrystal
that is battery backed to keep the time.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: dadd4256e12360d3ff1f6481b2e4697f9d890caf ]
(cherry picked from commit cb53815764403f7f17967a32eec2aeb6625b396f)
Reviewed-by: Kever Yang <[email protected]>
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The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 673c1353b3d476b9c5df6b84a777ed171e5594f5 ]
(cherry picked from commit dfa45bbda057851d0c2167b4c311c0301637cc19)
Reviewed-by: Kever Yang <[email protected]>
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As most Rockchip boards do, the TS433 also uses uart2 for its serial
output. Set the correct chosen entry for it.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: e1cb5d8a92e41171bf4d5ddc459bd96372500901 ]
(cherry picked from commit 1e1af2af2192490a3d174624ac1bb976aa6afffa)
Reviewed-by: Kever Yang <[email protected]>
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Enable usb controllers and phys and add regulator infrastructure for the
usb ports on the TS433.
Of course there are no schematics available for the device, so the
regulator information comes from the vendor-devicetree with unknown
accuracy.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: d992203f57c5caad0dbd4a9c669d79b315873c81 ]
(cherry picked from commit bb745ef13efb9f6589f9eda8f66664bf263a13f3)
Reviewed-by: Kever Yang <[email protected]>
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Uart0 is connected to an MCU on the board that handles system control
like the fan-speed. So far no driver for it is available though.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 07ef8be476bebd77cba3ca4804be03cc0dba414f ]
(cherry picked from commit aaa5b1c4bd8f0e4327078d513f0eef05cb829bcf)
Reviewed-by: Kever Yang <[email protected]>
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The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 0f5f87a1d602a33028522784eb005647fa1b5c11 ]
(cherry picked from commit 7d8f260e65cc84076ec9456954de0f136948a2c8)
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Add the vcc3v3-supply regulator and its link to the pcie controllers.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: e0ec6d48226fb3d4df18895b56f0b7a94c0fe474 ]
(cherry picked from commit 59939b4343db08fa08098238160007e6ded72be9)
Reviewed-by: Kever Yang <[email protected]>
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CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/23080
- board: migrate PolarFire to use OF_UPSTREAM
- dts: align DT with QEMU amd-microblaze-v-virt platform
- riscv: fix resume utility
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fixes & cleanups"
Jan Kiszka <[email protected]> says:
This adds support for the new IOT2050 SM variant, introduces a sysinfo
driver which also permits SMBIOS support and switches the board to
OF_UPSTREAM. There are some further fixes for the boards included as well.
Not yet included is configuration support for DMA isolation via the PVU as
this depends on not yet merged DT bindings and another overlay.
[trini: This is just the first 10 patches in the series for now]
Link: https://lore.kernel.org/r/[email protected]
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The U-Boot copy of the mpfs devicetree has, in general, been neglected
somewhat in comparison to the one in Linux. Moving to OF_UPSTREAM to
keep both in sync should serve to eliminate that discrepancy.
Additionally, moving to OF_UPSTREAM will let U-Boot automatically pick
up the devicetree rework that is in progress at [1].
Link: https://lore.kernel.org/all/20241002-private-unequal-33cfa6101338@spud/ [1]
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
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To allow firmware to pick up all DTs from here, move the overlays that
are normally applied during DT fixup to the kernel source as well. Hook
then into the build nevertheless to ensure that regular checks are
performed.
Signed-off-by: Jan Kiszka <[email protected]>
Link: https://lore.kernel.org/r/91f8b825467651ebd51a4051f153ab136eeb1849.1724830741.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: dba27d026fc841d28a0ed373f617cc84ec0e4504 ]
(cherry picked from commit 741915246a92fc4c21537f9623a69612f7cef03a)
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The PG1 A variant of the iot2050 series has been identified which
partially lacks support for lock-step mode. This implies that all
iot2050 boards can't support this mode. As a result, lock-step mode has
been disabled across all iot2050 boards for consistency and to avoid
potential issues.
Signed-off-by: Li Hua Qian <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Link: https://lore.kernel.org/r/d1f5f84db7a1597cd29628a0b503e578367b7b40.1724830741.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: e0133f883cf115d9e97e704169a9fb6003caefb2 ]
(cherry picked from commit 4b4872feb66a9043741819a57af280ffb4a96608)
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FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.
Signed-off-by: Marcin Juszkiewicz <[email protected]>
Reviewed-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: a22a629c63b1addcf2d81eaf30383c1deca5b7a9 ]
(cherry picked from commit 7588da65fdf09c7de9f903780c212a8ae96f2866)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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In the LTS (2310) version the miniPCIe slot got removed and USB 2.0
setup has changed. There are two external accessible ports and two ports
on the internal header.
There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector
The top USB 2.0 connector comes directly from the SoC.
Signed-off-by: Marcin Juszkiewicz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: db1dcbe5f752d423421f77d54d246398b196f670 ]
(cherry picked from commit f4a834fbc8cdb40fddd63d083e8d1c6189ba62dc)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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MiniPCIe slot is present only in first version of NanoPC-T6 (2301).
Signed-off-by: Marcin Juszkiewicz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: aea8d84070fe0846961deb23228d9dd3f8caefb3 ]
(cherry picked from commit 697963b1c22336a44ac2e33536c652aae1671b3d)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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FriendlyELEC introduced a second version of NanoPC-T6 SBC.
Create common include file and make NanoPC-T6 use it. Following
patches will add LTS version.
Signed-off-by: Marcin Juszkiewicz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: d14f3a4f1feabb6bb5935bf3b275a1e6bf2208eb ]
(cherry picked from commit e8b52bdfe5a1444edd1b9bb7cc10b9781d72cc84)
Signed-off-by: Jonas Karlman <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.
Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.
Signed-off-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 10dc64fe0f980c47c7e747885ddf7a8c12780337 ]
(cherry picked from commit f811548e758b52896f725753086c42b49dc42c0d)
Signed-off-by: Jonas Karlman <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.
Fixes: fd3583267703 ("arm64: dts: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <[email protected]>
Signed-off-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 735065e774dcfc62e38df01a535862138b6c92ed ]
(cherry picked from commit e7259a2c4a6f2ebdfc96b8bbffc77fe67604b11f)
Signed-off-by: Jonas Karlman <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.
Add initial support for eMMC, SD-card, Ethernet, PCIe and USB.
Signed-off-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: ce48b8c976ce439c336def6e06bf8224a8ff9125 ]
(cherry picked from commit 7ba62d8b4cb010c6fcb7077550b46d5f5fb5af6d)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22796
- Switch to using upstream DT on DH i.MX8MP DHCOM PDK2/PDK3.
- Add ability to build fallback DTBOs from arch/$(ARCH)/dts.
- Remove fdt_high and initrd_high env variables from imx6-dhcom.
- Add dummy clk for imx8.
- Fix DT corruption in imx8_cpu.
- Improve DDR stability on pico-imx7d.
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Currently the enablement of OF_UPSTREAM results on the build system
searching for DTs only in dts/upstream/ . There are platforms which
use U-Boot specific DTBOs applied on top of U-Boot control DT during
SPL stage, and source DTs for these are located in arch/$(ARCH)/dtb.
Add dedicated 'dtbos' target which builds only .dtbos and not .dtbs and
in case CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is enabled, build
this target for arch/$(ARCH)/dtb to generate local U-Boot specific DTBOs.
Adjust top level Makefile so binman would search for .dtb and .dtbo in
both OF_UPSTREAM specific paths and arch/$(ARCH)/dtb for the .dtbo case
in case CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is enabled.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Allow to use OF_OVERLAY_LIST also for the case that the overlays just
need be built, e.g. when they will be picked up by binman as artifacts
of the final U-Boot image. The IOT2050 boards have such a need when
switching to OF_UPSTREAM.
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The dtbs: target is almost identical in all architecture Makefiles.
All architecture Makefiles include scripts/Makefile.dts . Deduplicate
the dtbs: target into scripts/Makefile.dts . No functional change.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Caleb Connolly <[email protected]> #qcom, OF_UPSTREAM
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This switches all boards with the Allwinner H616/H618/H313/H700 SoCs over to
use OF_UPSTREAM. We are doing it for this SoC family only since the DTs
between the U-Boot and the kernel repo are exactly identical, whereas other
families have one compatibility fix in U-Boot to allow booting older kernels.
Other will follow if this plays out well.
The biggest chunk otherwise is adding support for an Anbernic game console,
using the H700 SoC. For that we need to enhance the DRAM support code, and
pick two DT commits from the mainline kernel/DT rebasing repo, followed
by the defconfig patch.
On top of that two small fixes for the old Allwinner A80.
Gitlab CI passed, and I booted that briefly on some boards, including an
H616 and an H618 one (with LPDDR4).
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Simon Glass <[email protected]> says:
When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL
Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.
For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.
This series starts a change in terminology and usage to resolve the
above issues:
- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_
It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.
This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.
The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
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