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MMC block needs 48Mhz source clock, for that we choose
to select the SAI PLL.
Update also stm32_clock_get_rate() to retrieve the MMC
clock source needed in MMC driver.
STM32F4 uses a different RCC variant than STM32F7. For STM32F4
sdmmc clocks bit are located into dckcfgr register whereas there
are located into dckcfgr2 registers on STM32F7.
In both registers, bits CK48MSEL and SDMMC1SEL are located at
the same position.
Signed-off-by: Christophe Priouzeau <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Vikas Manocha <[email protected]>
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This driver is adapted from linux drivers/reset/reset-stm32.c
It's compatible with STM32 F4/F7/H7 SoCs.
This driver doesn't implement .of_match as it's binded
by MFD RCC driver.
To add support for each SoC family, a SoC's specific
include/dt-binfings/mfd/stm32xx-rcc.h file must be added.
This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs.
Other SoCs support will be added in the future.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Use the same clocks macro than the one used by kernel DT.
Signed-off-by: Patrice Chotard <[email protected]>
Acked-by: Vikas MANOCHA <[email protected]>
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This device tree has been extracted from v4.9 kernel
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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