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Add basic support for the Nuvoton NPCM845 EVB (Arbel).
Signed-off-by: Jim Liu <[email protected]>
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This patch adds clock driver support for MediaTek MT7981 SoC
Reviewed-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds clock driver support for MediaTek MT7986 SoC
Reviewed-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Daniel Golle <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds a pinctrl header for common pinconf parameters such as
pull-up/pull-down resistors and drive strengths.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.
Signed-off-by: Jesse Taube <[email protected]>
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Add the clock binding doc for i.MXRT1170.
Signed-off-by: Jesse Taube <[email protected]>
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This allows to test if a pin's label if displayed using gpio_get_status()
when this pin is configured in alternate function.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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This commit sychronizes the header file for FU740 PRCI clocks with the
one from Linux 5.19.
The constant values are the same, but all constant names are changed
(most are just prefixed with FU740_).
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Makes it easier to add readable GPIO definitions in DTS files
for Aspeed SOC based boards.
Ported with small edits to add IBM copyright statement and fix
for checkpatch warning.
Signed-off-by: Dhananjay Phadke <[email protected]>
Reviewed-by: Billy Tsai <[email protected]>
Acked-by: Chia-Wei Wang <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220726
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i.MX for 2022.10
- Added i.MX93 architecture
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
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Add the DTSi file and DT header files for i.MX93 SoC
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The same file is already the part of Linux kernel that's why add it also to
u-boot to be able to use it in source code and DT files.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
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Currently this clock driver initializes clocks for UART and eMMC. Along
with this import "qcom,gcc-qcs404.h" header from Linux mainline to
support DT bindings.
Signed-off-by: Sumit Garg <[email protected]>
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Rather than using magic numbers as clock ids for peripherals import
qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids.
So start using corresponding clk-id macro for debug UART.
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Synchronise device tree with linux v5.19-rc5.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Synchronise device tree with linux v5.19-rc5.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Synchronise device tree with linux v5.19-rc5.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Synchronise device tree with linux v5.19-rc5.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
vf610-colibri-eval-v3.dtb rather than the previous vf610-colibri.dtb).
Signed-off-by: Marcel Ziswiler <[email protected]>
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Synchronise device tree with linux-next next-20220708.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Synchronise device trees with linux-next next-20220708.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Sync imx8mm.dtsi device tree with linux-next 20220711.
The main motivation for doing this sync is the sha256 regression
reported by Andrey Zhizhikin [1].
The linux-next kernel has the following commit, which disables
the job ring 0 and fixes the problem:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20220715&id=dc9c1ceb555ff661e6fc1081434600771f29657c
[1] https://lore.kernel.org/u-boot/AM6PR06MB46912207D9460CD9924F35DAA68B9@AM6PR06MB4691.eurprd06.prod.outlook.com/T/#t
Signed-off-by: Fabio Estevam <[email protected]>
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This patch adds reset controller bits definition header file for MediaTek
MT7621 SoC
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds a clock driver for MediaTek MT7621 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Reviewed-by: Sean Anderson <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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Device tree alignment with Linux kernel v5.19-rc1
- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
stm32mp15
+ patch from stm32-dt-for-v5.19-fixes-2
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Include microchip,pdmc.h from Linux.
This file includes required defines for DT successful build.
Signed-off-by: Eugen Hristev <[email protected]>
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Add pinctrl macros for AM62x SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Suman Anna <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.
Signed-off-by: Samuel Holland <[email protected]>
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Add clock controller driver for NPCM750
Signed-off-by: Jim Liu <[email protected]>
Signed-off-by: Stanley Chu <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
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Add basic support for the Nuvoton NPCM750 EVB (Poleg).
Signed-off-by: Jim Liu <[email protected]>
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This allows usage of LED_COLOR_ID_RGB macro in DTS files.
Signed-off-by: Pali Rohár <[email protected]>
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Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.
Tested-By: Tim Harvey <[email protected]> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree
This patch move it in U-Boot as well.
Signed-off-by: Jesse Taube <[email protected]>
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Sync the clock ids with the mainline kernel
077de6e1c9f ("clk: imx8mq: add PLL monitor output")
Signed-off-by: Angus Ainslie <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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There are some new power domain IDs which are used in Linux kernel that's
why add them here too.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e6092e1d3766c0ac11bf620820739c93ab677a85.1648626981.git.michal.simek@xilinx.com
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Make sure that both files are in sync to have the same values in DTs.
The patch is fixing SPDX license as is used in the kernel and adding new
values for PHY_TYPE_DPHY and PHY_TYPE_CPHY.
SPDX license change was done by:
Link: https://lkml.kernel.org/r/[email protected]
and new value added by:
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/06dbc03d4c9ac5d621341d8fb8cc16f489062b39.1648113469.git.michal.simek@xilinx.com
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Add support for Kevin, an RK3399-based convertible chromebook that is
very similar to Bob. This patch is mostly based on existing support for
Bob, with only minor changes for Kevin-specific things.
Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV,
so adjust it here in the dts as well. The rk3399-gru-kevin devicetree
has an unknown event code reference which has to be defined, set it
to the Linux counterpart. The new defconfig is copied from Bob with the
diffconfig:
DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin"
DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb"
VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400
VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600
+TARGET_CHROMEBOOK_KEVIN y
With this Kevin can boot from SPI flash to a usable U-Boot prompt on the
display with the keyboard working, but cannot boot into Linux for
unknown reasons.
eMMC starts in a working state but fails to re-init, microSD card works
but at a lower-than-expected speed, USB works but causes a hang on
de-init. There are known workarounds to solve eMMC and USB issues.
Cc: Marty E. Plummer <[email protected]>
Cc: Simon Glass <[email protected]>
[Alper: commit message, resync config with Bob, update MAINTAINERS,
add to Rockchip doc, add Kconfig help message, set regulator]
Co-developed-by: Alper Nebi Yasak <[email protected]>
Signed-off-by: Alper Nebi Yasak <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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This change updates all Armada 37xx DTS files to version which is used by
Linux kernel v5.18.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add binding to specify Spread Spectrum Clocking mode used
Signed-off-by: Swapnil Jakhade <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
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Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Aswath Govindraju <[email protected]>
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There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.
Signed-off-by: Aswath Govindraju <[email protected]>
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Update to the 5.16 imx8mq dts files and dt bindings
Changes since v1:
Dropped rfkill.h that is not in linux mainline yet.
Signed-off-by: Angus Ainslie <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.
Signed-off-by: Richard Zhu <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Tim Harvey <[email protected]>
Tested-by: Tim Harvey <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Pick from Linux f6f787874aa5 ("dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy")
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Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.
dt-bindings/dts are synced with 5.16.0
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Jesse Taube <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.04-rc1
gpio:
- Add modepin driver
net:
- Save random mac addresses to eth variable
zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses
zynqmp clk:
- Fix clock handling for gem and usb
phy:
- Add zynqmp phy/serdes driver
serial:
- Add one missing compatible string
microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups
zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver
versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
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