| Age | Commit message (Collapse) | Author |
|---|
|
This is not needed now that the memory controller driver has the SPD data
in its own node.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
We don't need this anymore - we can use device tree and the new pinconfig
driver instead.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Adjust the driver to use driver model. The SOR becomes a bridge device. We
use the normal simple_panel driver to handle the display itself. We also
need to enable some options such as regulators, PWMs and DM_VIDEO itself.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
Introduce fdtdec_get_child_count for get the number of subnodes
of one parent node.
Signed-off-by: Peng Fan <[email protected]>
Cc: Simon Glass <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
We use driver model for this now, so we don't need this string.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Now that driver model support is available, convert sandbox over to use it.
We can remove a few of the special hooks that sandbox currently has.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
|
|
|
|
Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
|
|
Use the driver model version of the function to find the BAR. This updates
the fdtdec function, of which ns16550 is the only user.
The fdtdec_get_pci_bdf() function is dropped for several reasons:
- with driver model we should use 'struct udevice *' rather than passing the
device tree offset explicitly
- there are no other users in the tree
- the function parses for information which is already available in the PCI
device structure (specifically struct pci_child_platdata which is available
at dev_get_parent_platdata(dev)
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
|
|
The USB gadget framework does not support DM yet, so add this bit
to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Lukasz Majewski <[email protected]>
|
|
Adjust the Tegra PCI driver to support driver model and move all boards over
at the same time. This can make use of some generic driver model code, such
as the range-decoding logic.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Stephen Warren <[email protected]>
|
|
Adjust the tegra keyboard driver to support driver model, using the new
uclass. Make this the default for all Tegra boards so that those that use
a keyboard will build correctly with this driver.
Signed-off-by: Simon Glass <[email protected]>
|
|
This needs a separate compatible value from Tegra124 since the new HW
version has bugs that would prevent a driver for previous HW versions
from operating at all.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
|
|
Adding fdtdec_get_uint function which is the
unsigned version for fdtdec_get_int
Signed-off-by: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Vikas Manocha <[email protected]>
Cc: Jagannadh Teki <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Heiko Schocher <[email protected]>
|
|
It is sometimes useful to find a property in the chosen node. Add a function
for this.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
fdtdec_get_addr_size() hard-codes the number of cells used to represent
an address or size in DT. This is incorrect in many cases depending on
the DT binding for a particular node or property (e.g. it is incorrect
for the "reg" property). In most cases, DT parsing code must use the
properties #address-cells and #size-cells to parse addres properties.
This change splits up the implementation of fdtdec_get_addr_size() so
that the core logic can be used for both hard-coded and non-hard-coded
cases. Various wrapper functions are implemented that support cases
where hard-coded cell counts should or should not be used, and where
the client does and doesn't know the parent node ID that contains the
properties #address-cells and #size-cells.
dev_get_addr() is updated to use the new functions.
Core functionality in fdtdec_get_addr_size_fixed() is widely tested via
fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and
dev_get_addr() by manually modifying the Tegra I2C driver to invoke them.
Much of the core implementation of fdtdec_get_addr_size_fixed(),
fdtdec_get_addr_size_auto_parent(), and
fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's
previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit".
Based-on-work-by: Thierry Reding <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Michal Suchanek <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Dropped #define DEBUG at the top of fdtdec.c:
Signed-off-by: Simon Glass <[email protected]>
|
|
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.
This patch now also removes previous temporary workaround.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Pantelis Antoniou <[email protected]>
Cc: Tom Rini <[email protected]>
|
|
Convert the tpm_tis_i2c driver to use driver model and update boards which
use it.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Christophe Ricard<[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
|
|
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:
#ifdef CONFIG_OF_CONTROL
# if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
# define OF_CONTROL 0
# else
# define OF_CONTROL 1
# endif
#else
# define OF_CONTROL 0
#endif
Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.
Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Linus Walleij <[email protected]>
|
|
As we discussed a couple of times, negative CONFIG options make our
life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ...
and here is another one.
Now, there are three boards enabling OF_CONTROL on SPL:
- socfpga_arria5_defconfig
- socfpga_cyclone5_defconfig
- socfpga_socrates_defconfig
This commit adds CONFIG_SPL_OF_CONTROL for them and deletes
CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert
the logic.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
There is no case where defined(SPL_DISABLE_OF_CONTROL) is true.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Allow for configuration of FSP UPD from the device tree which will
override any settings which the FSP was built with itself.
Modify the MinnowMax and BayleyBay boards to transfer sensible UPD
settings from the Intel FSPv4 Gold release to the respective dts files,
with the condition that the memory-down parameters for MinnowMax are
also used.
Signed-off-by: Andrew Bradford <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay
Fixed lines >80col
Signed-off-by: Simon Glass <[email protected]>
|
|
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc
hardcoded values in the U-Boot code. Since we don't have a proper reset
framework in place yet, we have to do this slightly ad-hoc parsing of the
OF tree instead.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Joe Hershberger <[email protected]>
|
|
fdt_addr_t is a physical address. It can be either 64-bit or 32-bit,
depending on the architecture. It should be phys_addr_t instead of
u64 or u32. Similarly, fdt_size_t is changed to phys_size_t.
Signed-off-by: York Sun <[email protected]>
CC: Simon Glass <[email protected]>
|
|
This has moved to driver model so we can drop the fdtdec support.
Signed-off-by: Simon Glass <[email protected]>
|
|
We have a new one which uses driver model and device tree configuration.
Remove the old one.
Signed-off-by: Simon Glass <[email protected]>
|
|
Remove the old drivers (both the normal one and the cros_ec one) now that
we have new drivers that use driver model.
Signed-off-by: Simon Glass <[email protected]>
|
|
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too. This also adds misc 64-bit changes
from Thierry Reding/Stephen Warren.
Signed-off-by: Tom Warren <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>
|
|
Drop the code that doesn't use driver model for USB.
Signed-off-by: Simon Glass <[email protected]>
|
|
Move this over to Kconfig and tidy up.
Signed-off-by: Simon Glass <[email protected]>
|
|
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
The SOR is required for talking to eDP LCD panels. Add a driver for this
which will be used by the DisplayPort driver.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
This is useful for display parameters. Add a simple decode function to read
from this device tree node.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
Drop the code that doesn't use driver model for USB.
Signed-off-by: Simon Glass <[email protected]>
|
|
Some boards will not use device tree for SPL even with driver model. Add
the logic to support this.
Signed-off-by: Simon Glass <[email protected]>
|
|
There is little reason to split these two functions. Bring them together
which simplifies the init sequence.
Signed-off-by: Simon Glass <[email protected]>
|
|
We want to be able to set up the device tree in SPL, so move this code
to a common place.
Signed-off-by: Simon Glass <[email protected]>
|
|
The U-Boot device trees are slightly different in a few places. Adjust them
to remove most of the differences. Note that U-Boot does not support the
concept of interrupts as distinct from GPIOs, so this difference remains.
For sandbox, use the same keyboard file as for ARM boards and drop the
host emulation bus which seems redundant.
Signed-off-by: Simon Glass <[email protected]>
|
|
This is not needed now that we have moved chromebook_link and cros_ec to
driver model.
Signed-off-by: Simon Glass <[email protected]>
|
|
This is not needed now that we have moved to driver model.
Signed-off-by: Simon Glass <[email protected]>
|
|
The PCH (Platform Controller Hub) is on the PCI bus, so show it as such.
The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the
right place also.
Rename the compatible strings to be more descriptive since this board is the
only user. Once we are using driver model fully on x86, these will be
dropped.
Signed-off-by: Simon Glass <[email protected]>
|
|
This function returns -ENOENT when the property is missing (which the caller
might forgive) and also when the property is present but incorrectly
formatted (which many callers would like to report).
Update the error return value to allow these different situations to be
distinguished.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
This function is missing a prototype but is more widey useful. Add it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Add the description that how the compatible property is involved in
the fdtdec_get_pci_bdf() documentation.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Panasonic's System LSI products, UniPhier SoC family, have been
transferred to Socionext Inc.
Signed-off-by: Masahiro Yamada <[email protected]>
|
|
Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Marek Vasut <[email protected]>
|
|
Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can
decode Intel Quark MRC node.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
This has moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Minkyu Kang <[email protected]>
|
