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Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Bryan Brattlof <[email protected]>
Signed-off-by: Vaishnav Achath <[email protected]>
Signed-off-by: Jayesh Choudhary <[email protected]>
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Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Neha Malcom Francis <[email protected]>
Signed-off-by: Bryan Brattlof <[email protected]>
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Add clk and device data which can be used by respective drivers
to configure clocks and PSC.
Signed-off-by: Hari Nagalla <[email protected]>
Signed-off-by: Apurva Nandan <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]> # AM69-SK
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Replace instances of http://www.ti.com with https://www.ti.com
Signed-off-by: Nishanth Menon <[email protected]>
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Introduce the auto-generated clock tree and power domain data needed to
attach the am62a into the power-domain and clock frameworks of uboot
Signed-off-by: Bryan Brattlof <[email protected]>
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Introduce autogenerated SoC data support clk and device data for the
AM62. Hook it upto to power-domain and clk frameworks of U-Boot.
Signed-off-by: Dave Gerlach <[email protected]>
Signed-off-by: Suman Anna <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Add support for J721S2 SoC.
Signed-off-by: David Huang <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add support command for debugging K3 power domains. This is useful with
the HSM rearch setup, where power domains are directly controlled by SPL
instead of going through the TI SCI layer. The debugging support is only
available in the u-boot codebase though, so the raw register access
power domain layer must be enabled on u-boot side for this to work. By
default, u-boot side uses the TI SCI layer, and R5 SPL only uses the
direct access methods.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Normally, power domains are handled via TI-SCI in K3 SoCs. However,
SPL is not going to have access to sysfw resources, so it must control
them directly. Add driver for supporting this.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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