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Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
[mb: squash fix to only build xhci_reset_hw() if CONFIG_DM_BUS]
Signed-off-by: Matthias Brugger <[email protected]>
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There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.
This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.
Cc: Sergey Temerkhanov <[email protected]>
Signed-off-by: Sylwester Nawrocki <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Nicolas Saenz Julienne <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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This patch is used to support the on-chip xHCI controller on
MediaTek SoCs, currently control/bulk/interrupt transfers are
supported.
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Weijie Gao <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Migrate to use ofnode_* instead of fdt_* so that we may able to use live
dt for usb udc driver.
Signed-off-by: Kever Yang <[email protected]>
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The xhci.h header file is currently located under drivers/usb/xhci
Move it to the include/usb folder to make it available to drivers that
are not under drivers/usb/xhci
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Add compatible "st,stm32mp1-hsotg" and associated driver data to manage
the usb33d-supply and the ST specific register for VBus sensing.
Signed-off-by: Patrick Delaunay <[email protected]>
# Conflicts:
# drivers/usb/gadget/dwc2_udc_otg.c
Reviewed-by: Lukasz Majewski <[email protected]>
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All TX fifo size can be different, add tx_fifo_sz_array[]
into dwc2_plat_otg_data to be able to set them.
tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
tx fifo size (synopsys IP supports max 16 IN endpoints).
First entry of tx_fifo_sz_array[] is the number of valid
fifo size the array contains.
In case of tx_fifo_sz_array[] doesn't contains the same
number of element than max hardware endpoint, display
a warning message.
Compatibility with board which doesn't use tx_fifo_sz_array[]
(Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.
Signed-off-by: Patrice Chotard <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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Add a new function to check the session B validity, to be use to check
cable connection.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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Handle "force-b-session-valid" property from DT.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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The BITMAP related operations can now be moved to ./include/linux/bitmap.h
file to mimic the Linux kernel directory tree.
This change also allows to remove the lin_gadget_compat.h header file
(which is a legacy code only for composite U-boot layer).
It was also possible to remove #includes from several USB gadget drivers.
Signed-off-by: Lukasz Majewski <[email protected]>
Reviewed-by: Stefan Agner <[email protected]>
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The regs_phy field of the platform data structure for dwc2-otg is
today declared an unsigned int, but will eventually be cast into a
void* for a writel operation. This triggers errors on modern GCC
versions.
E.g. we get the following error with GCC 6.3:
drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
^
arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^~~~~~~~~~~
drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel'
writel(val, pdata->regs_phy + reg->offset);
^~~~~~
This commit changes regs_phy to be a uintptr_t to ensure that it is
large enough to hold any valid pointer (and fix the associated
warning).
Signed-off-by: Philipp Tomsich <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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Same macros are defined in various places. Collect them into
include/linux/bitops.h like Linux.
Signed-off-by: Masahiro Yamada <[email protected]>
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When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:601:5: warning: no previous prototype for ‘board_ehci_power’ [-Wmissing-prototypes] int board_ehci_power(int port, int on)
Remove this warning by adding the function prototype into usb/ehci-ci.h file.
Signed-off-by: Diego Dorta <[email protected]>
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Commit a8ecb39e accidentally reverted config macro CONFIG_ARCH_LS1021A
to CONFIG_LS102XA.
Signed-off-by: York Sun <[email protected]>
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Signed-off-by: Rajat Srivastava <[email protected]>
Signed-off-by: Rajesh Bhagat <[email protected]>
Signed-off-by: yinbo.zhu <[email protected]>
[YS: Revise subject, remove commit message]
Reviewed-by: York Sun <[email protected]>
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There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.
Signed-off-by: Heiko Schocher <[email protected]>
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There was for long time no activity in the 8xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8xx,
so remove it (with a heavy heart, knowing that I remove
here the root of U-Boot).
Signed-off-by: Heiko Schocher <[email protected]>
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The regs_otg field in uintptr_t of the platform data structure for
dwc2-otg has thus far been an unsigned int, but will eventually be
casted into a void*.
This raises the following error with GCC 6.3 and buildman:
../drivers/usb/gadget/dwc2_udc_otg.c: In function 'dwc2_udc_probe':
../drivers/usb/gadget/dwc2_udc_otg.c:821:8: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
^
This changes regs_otg to a uintptr_t to ensure that it is large enough
to hold any valid pointer (and fix the associated warning).
Signed-off-by: Philipp Tomsich <[email protected]>
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Use CONFIG_ARCH_LS1021A instead.
Signed-off-by: York Sun <[email protected]>
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Collect a couple of duplicated defines into a single place.
Signed-off-by: Masahiro Yamada <[email protected]>
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Remove Soc specific defines and use generic chasis specific defines
for USB controller base address mapping.
Signed-off-by: Rajesh Bhagat <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The total FIFO size of some SoCs may be different from the existen, this
patch supports fifo size setting from platform data.
Signed-off-by: Ziyuan Xu <[email protected]>
Acked-by: Simon Glass <[email protected]>
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So far, Rockchip SoCs have two kinds of USB2.0 phy, such as Synopsys and
Innosilicon. This patch applys dwc2 usb driver framework to implement
phy_init() and phy_off() methods for Synopsys phy on Rockchip platform.
Signed-off-by: Ziyuan Xu <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Simon Glass <[email protected]>
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Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.
The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.
Signed-off-by: Mateusz Kulikowski <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Tested-by: Simon Glass <[email protected]>
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Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Simon Glass <[email protected]>
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ulpi_read and ulpi_write are used to read/write registers via ULPI bus.
Code generates compilation warnings on 64-bit machines where pointer
is cast to u32.
This patch drops all but last 8 bits of register address.
It is possible, because addresses on ULPI bus are 6- or 8-bit.
It is not possible (according to ULPI 1.1 spec) to have more
than 8-bit addressing.
This patch should not cause regressions as all calls to
ulpi_read/write use either structure pointer (@ address 0) or integer
offsets cast to pointer - addresses requested are way below 8-bit range.
Signed-off-by: Mateusz Kulikowski <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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viewport_addr is address of memory mapped ULPI viewport.
It is used only as argument to readl/writel later
causing compile warnings on 64-bit devices.
This fix changes its type to match pointer size.
Signed-off-by: Mateusz Kulikowski <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously. Convert all of these to the correct SPDX-License-Identifier
tag.
Signed-off-by: Tom Rini <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.
The rename is done automatically:
$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
`git grep "s3c_udc\.h" | cut -d : -f 1`
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch is the second and final to rename global symbol,
the s3c_udc_probe() function.
The rename is done automatically:
$ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \
`git grep s3c_udc_probe | cut -d : -f 1`
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch is the first to rename global symbol, the struct
s3c_plat_otg_data.
The rename is done automatically:
$ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \
`git grep s3c_plat_otg_data | cut -d : -f 1`
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
Tweak the comments in the driver to reflect this fact.
Signed-off-by: Marek Vasut <[email protected]>
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The extern statements are useless, remove them. Also remove the
extern ... controller, which is completely useless.
Signed-off-by: Marek Vasut <[email protected]>
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Most of the functions are local to the s3c_udc driver, remove them
from the s3c_udc.h header to stop those bits from propagating all
over the place. Instead, move all the private stuff into new private
s3c_udc_otg_priv.h header.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_udc to struct dwc2_udc to make
things more obvious and clear.
Signed-off-by: Marek Vasut <[email protected]>
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Conflicts:
board/freescale/mx6sxsabresd/mx6sxsabresd.c
Signed-off-by: Tom Rini <[email protected]>
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Define USB configs for LS1021XA such as CONFIG_SYS_FSL_USB1_ADDR,
CONFIG_USB_MAX_CONTROLLER_COUNT
Signed-off-by: Nikhil Badola <[email protected]>
Reviewed-by: York Sun <[email protected]>
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usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'.
Include a new board weak function board_usb_phy_mode. If board code
does not reimplement this function, it just call usb_phy_mode and return
usb_phy_mode's return value. The reason to include such a weak function
is: " SOC OTG core <--connect--> board HOST port, but no pin id for
the board host port, so board can not use usb_phy_mode to return the
phy mode, but define it's own rule."
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
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Allow passing in a custom configuration of the gusbcfg register
via platform data.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Vince Bridgers <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Cc: Stefan Roese <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
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[1] arch/arm/include/asm/arch-at91/at91_shdwn.h
The top9000 was the last board to use this header file.
It was removed by commit d58a9451e733 (ppc/arm: zap EMK boards).
[2] board/matrix_vision/common/*
Some Matrix Vision boards were dropped by commit e7a565638a7a
(powerpc: mpc83xx: remove board support for MERGERBOX and MVBLM7)
and commit af55e35d3389
(powerpc: mpc5xxx: remove board support for MVBC_P and MVSMR).
Since then these files have been unused.
[3] include/usb/omap1510_udc.h
The omap5912osk was the last board to use this header file.
It was removed by commit 62d636aa2ac2
(omap: remove omap5912osk board support).
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-By: Wolfgang Denk <[email protected]>
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resync ubi subsystem with linux:
commit 455c6fdbd219161bd09b1165f11699d6d73de11c
Author: Linus Torvalds <[email protected]>
Date: Sun Mar 30 20:40:15 2014 -0700
Linux 3.14
A nice side effect of this, is we introduce UBI Fastmap support
to U-Boot.
Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Sergey Lapin <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Joerg Krause <[email protected]>
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The following configs are not defined at all.
- CONFIG_OMAP1510
- CONFIG_OMAP_1510P1
- CONFIG_OMAP_SX1
- CONFIG_OMAP3_DMA
- CONFIG_OMAP3_ZOOM2
- CONFIG_OMAP_INNOVATOR
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Tom Rini <[email protected]>
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Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit
Signed-off-by: Nikhil Badola <[email protected]>
Signed-off-by: Ramneek Mehresh <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0.
This decreases data burst rate with which data packets are posted from the TX
latency FIFO to compensate for latencies in DDR pipeline during DMA.
This avoids Tx buffer underruns and leads to successful usb writes
Signed-off-by: Ramneek Mehresh <[email protected]>
Signed-off-by: Nikhil Badola <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Vineet Gupta <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Albert Aribaud <[email protected]>
Acked-by: Tom Rini <[email protected]>
Acked-by: Stefan Roese <[email protected]>
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini <[email protected]>
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With e0059ea switching to using SZ_1K, we need to #include <asm/sizes.h>
here for everyone to build still.
Signed-off-by: Tom Rini <[email protected]>
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