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This commit adds additional file with implementation of board
detection code for Odroid-XU3/XU4.
The detection depends on compatible found in fdt:
- "samsung,exynos5" - uses Exynos5 generic code
- "samsung,odroidxu3" - try detect XU3 revision
There are few revisions of Odroid XU3/XU4, each can be detected
by checking the value of channel 9 of built-in ADC:
Rev ADC Board
0.1 0 XU3 0.1
0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT
0.3 1280 XU4 0.1
The detection code depends on the ADC+10% value.
Implementation of functions:
- set_board_type() - read ADC and set type
- get_board_rev() - returns board revision: 1..3
- get_board_type() - returns board type string
Additional functions with return values of bool:
- board_is_generic() - true if found compatible "samsung,exynos5"
but not "samsung,odroidxu3"
- board_is_odroidxu3() - true if found compatible "samsung,odroidxu3"
and one of XU3 revision.
- board_is_odroidxu4() - true if found compatible "samsung,odroidxu3"
and XU4 revision.
After I2C controller init, the get_board_type() can check
if the XU3 board is a "Lite" variant, by probing chip
0x40 on I2C0 (INA231 - exists only on non-lite).
This is useful for setting fdt file name at misc_init_r().
Enabled configs:
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- CONFIG_ODROID_REV_AIN
- CONFIG_REVISION_TAG
- CONFIG_BOARD_TYPES
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c
The new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit mask
ADC uclass's functions:
* single-channel:
- adc_start_channel() - start channel conversion
- adc_channel_data() - get conversion data
- adc_channel_single_shot() - start/get conversion data
* multi-channel:
- adc_start_channels() - start selected channels conversion
- adc_channels_data() - get conversion data
- adc_channels_single_shot() - start/get conversion data for channels
selected by bit mask
* general:
- adc_stop() - stop the conversion
- adc_vdd_value() - positive reference Voltage value with polarity [uV]
- adc_vss_value() - negative reference Voltage value with polarity [uV]
- adc_data_mask() - conversion data bit mask
The device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply: phandle to Vdd regulator's node
- vss-supply: phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
- vdd-microvolts: positive reference Voltage [uV]
- vss-microvolts: negative reference Voltage [uV]
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Some devices are supplied by configurable regulator's output.
But there was no function for getting it. This commit adds
function, that allows for getting the supply device by it's phandle.
The returned regulator device can be used with regulator uclass's API.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This driver allows I/O operations on the Samsung S2MPS11 PMIC,
which provides lots of LDO/BUCK outputs.
To enable it, update defconfig with:
- CONFIG_PMIC_S2MPS11
and additional, if were not defined:
- CONFIG_CMD_PMIC
- CONFIG_ERRNO_STR
The binding info: doc/device-tree-bindings/pmic/s2mps11.txt
Signed-off-by: Przemyslaw Marczak <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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As more features are added for SD boot on LS1021A QDS board,
the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
needs to be adjusted to a suitable value.
Starting address of the malloc pool used in SPL needs to be
adjusted too, or it will occupy the address u-boot loads.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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I2C1 can work on ls102xa rev2.0 SD boot, so add
ID EEPROM for SD boot.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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SR_IE(Self-refresh interrupt enable) is needed for
Hardware Based Self-Refresh. Make it configurable and let
board code handle the rest.
Signed-off-by: Joakim Tjernlund <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Currently there is no API to uninitialize mdio. Add two APIs for this.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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The net_boot_file_name buffer is used as storage for the bootfilename
command line argument to network boot commands such as tftp and nfs.
Increase the size of this buffer to 1024 bytes as the current size of
128 bytes is restrictive for arbitrary paths on the server.
Signed-off-by: Jacob Stiffler <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel
fails to access the device tree blob on boot. The reason is that u-boot
relocates the device tree blob into high memory when booting the kernel
and the kernel is unable to access the blob.
To avoid this issue, fdt_high is set to the value of 0xffffffff. The
device tree blob will not get relocated and is still in low memory to
make it accessible to the kernel.
For the same reason, initrd_high is set to the value of 0xffffffff too.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch adds esdhc support for ls1043ardb.
Signed-off-by: Yangbo Lu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Gong Qianyu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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LS1043ARDB Specification:
-------------------------
Memory subsystem:
* 2GByte DDR4 SDRAM (32bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 16 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* XFI 10G port
* QSGMII with 4x 1G ports
* Two RGMII ports
PCIe:
* PCIe2 (Lanes C) to mini-PCIe slot
* PCIe3 (Lanes D) to PCIe slot
USB 3.0: two super speed USB 3.0 type A ports
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Li Yang <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
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Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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There are two LS series processors are built on ARMv8 Layersacpe
architecture currently, LS2085A and LS1043A. They are based on
ARMv8 core although use different chassis, so create fsl-layerscape
to refactor the common code for the LS series processors which also
paves the way for adding LS1043A platform.
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
and PPC, move it out of ppc to include/, and change the path in
drivers accordingly.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch specific directory.
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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For most PPC platforms, they will call the first get_clocks() in
init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is
then defined to call the second get_clocks(), which should be
redundant for PPC.
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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To support on board Aquantia's PHY AQR405.
Signed-off-by: Shaohui Xie <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
be depend on endianness of SEC block as 32 bit low and
high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
descriptor will vary depending on endianness of SEC.
Signed-off-by: Aneesh Bansal <[email protected]>
Reviewed-by: York Sun <[email protected]>
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For the Chain of Trust, the esbc_validate command supports
32 bit fields for location of the image. In the header structure
definition, these were declared as pointers which made them
64 bit on a 64 bit core.
Signed-off-by: Aneesh Bansal <[email protected]>
Reviewed-by: York Sun <[email protected]>
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As we don't modify the 'name' parameter, so change it to const.
Signed-off-by: Josh Wu <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: John Otken <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This patch changes the cword union to use specific length types that are
architecture indepented.
This patch also renames the members of the cword union to represent
their usage, i.e.:
c -> w8
s -> w16
l -> w32
ll -> w64
Where "w" stands for "width" in bits.
I discovered this problem when enabling CFI flash on vexpress64.
cword.l was an unsigned long int, but it was intended to be 32 bits wide.
Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a
64-bit system fails when attempting to use 32-bit wide CFI flash parts.
Similar problems also existed with the other cword sizes.
Signed-off-by: Ryan Harkin <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in
SD boot now. For the customer's demand, QSPI needs to be supported in SD
boot too.
This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The address of uboot changed, so change qe ucode
Signed-off-by: Zhao Qiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This will allow OF-based earlycon to be used once the appropriate
aliases are added to the device tree and kernel support is fixed.
Signed-off-by: Scott Wood <[email protected]>
Reviewed-by: York Sun <[email protected]>
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sync with linux v4.2
commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <[email protected]>
Date: Sun Aug 30 11:34:09 2015 -0700
Linux 4.2
This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.
Signed-off-by: Heiko Schocher <[email protected]>
Tested-by: Ezequiel Garcia <[email protected]>
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add missing definitions for the ubi/ubifs sync
with linux 4.2, also change "#define kfree ..."
into a static inline, so prevent ubi compile error:
CC drivers/mtd/ubi/fastmap.o
drivers/mtd/ubi/fastmap.c: In function 'scan_pool':
drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function
Signed-off-by: Heiko Schocher <[email protected]>
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This patch adds flag status register reading support to
spi_flash_cmd_wait_ready.
Cc: Simon Glass <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Siva Durga Prasad Paladugu <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Hou Zhiqiang <[email protected]>
Tested-by: Jagan Teki <[email protected]>
Tested-by: Bin Meng <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.
[Correct the spi flash flags detect logic]
Signed-off-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE
and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL
spi mode. These macros defines the device tree offset, size
and the kernel image offset in flash respectively.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch enabled CONFIG_SPI_FLASH_ISSI for qspi on zynq boards.
Signed-off-by: Jagan Teki <[email protected]>
Cc: Siva Durga Prasad Paladugu <[email protected]>
Cc: Michal Simek <[email protected]>
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Enabled SPI flash Bank/Extended address register support.
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
Signed-off-by: Jagan Teki <[email protected]>
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This patch adds support for zynq qspi controller driver
on zynq-common.h
Signed-off-by: Jagan Teki <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Siva Durga Prasad Paladugu <[email protected]>
Acked-by: Michal Simek <[email protected]>
Tested-by: Jagan Teki <[email protected]>
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get_clocks() should not be limited by ESDHC.
Signed-off-by: Gong Qianyu <[email protected]>
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We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.
Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.
Signed-off-by: Masahiro Yamada <[email protected]>
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