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2011-04-10fsl_esdhc: Deal with watermark level register related changesPriyanka Jain
P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark level register description has been changed: 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00 25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00 Signed-off-by: Priyanka Jain <[email protected]> Signed-off-by: Poonam Aggrwal <[email protected]> Tested-by: Stefano Babic <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-10powerpc/85xx: Add PBL boot from SPI flash support on P4080DSShaohui Xie
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as 1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from CPC after PBL completes RCW and PBI phases. Signed-off-by: Chunhe Lan <[email protected]> Signed-off-by: Mingkai Hu <[email protected]> Signed-off-by: Shaohui Xie <[email protected]> Signed-off-by: Roy Zang <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-10powerpc/85xx: Update default hwconfig on P1022DSJiang Yutang
Set default configuration to have SDHC controller enabled, AUDIO enabled(codec clock sources is 12MHz) and disable TDM. Signed-off-by: Jiang Yutang <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-10powerpc/85xx: Enable support for ATI graphics cards on P1022DSJiang Yutang
Make the support for ATI graphics cards mutually exclusive with DIU. Signed-off-by: Jiang Yutang <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-09powerpc/85xx: Drop CONFIG_VIDEO support on corenet_ds boardsKumar Gala
We don't really ever use Video cards on corenet_ds style boards and its bloating our image which is close the its max size. Drop support and also kill some defines for non-PNP PCI which we never use. Signed-off-by: Kumar Gala <[email protected]>
2011-04-08powerpc/85xx: rename NAND prefixes to CONFIG_SYSMatthew McClintock
renaming 85xx define CONFIG_NAND_OR_PRELIM to CONFIG_SYS_NAND_OR_PRELIM and CONFIG_NAND_BR_PRELIM to CONFIG_SYS_NAND_BR_PRELIM to use the more appropriate CONFIG_SYS prefix as well as be consistent with 83xx. Signed-off-by: Matthew McClintock <[email protected]> cc: Scott Wood <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-08Blackfin: bf548-ezkit: move env sectorMike Frysinger
U-Boot itself takes up more than 0x40000 bytes, so we can't use that sector for the environment. Move it down a page. Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: adi boards: enable CONFIG_MONITOR_IS_IN_RAMMike Frysinger
Our monitor is always in RAM, so enable this define for the CFI layer. Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: adi boards: enable ldrinfoMike Frysinger
Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: adi boards: drop old ELF defineMike Frysinger
This define isn't used anywhere anymore, so punt it. Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: bf506f-ezkit: new board portMike Frysinger
Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: bf561-ezkit/ibf-dsp561: invert env offset/addr logicMike Frysinger
Have CONFIG_ENV_ADDR be based on CONFIG_ENV_OFFSET rather than the other way around so that we can use CONFIG_ENV_OFFSET during build. It also avoids a little address duplication. Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: bf537-minotaur/bf537-srv1: undefine nfs when net is disabledMike Frysinger
Fixes a build error due to new partial linking logic. Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: bf525-ucr2: new board portChong Huang
Signed-off-by: Chong Huang <[email protected]> Signed-off-by: Haitao Zhang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: dnp5370: new board portAndreas Schallenberg
Info about the hardware can be found here: http://www.dilnetpc.com/dnp0086.htm Signed-off-by: Andreas Schallenberg <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-04-08Blackfin: move CONFIG_BFIN_CPU back to board config.hMike Frysinger
This is a revert of 821ad16fa9900c as Wolfgang doesn't like the new code. Signed-off-by: Mike Frysinger <[email protected]>
2011-04-07mtd, cfi: introduce void flash_protect_default(void)Heiko Schocher
collect code which protects default sectors in a function, called flash_protect_default. So boardspecific code can call it too. Signed-off-by: Heiko Schocher <[email protected]> Signed-off-by: Stefan Roese <[email protected]>
2011-04-05Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
Conflicts: drivers/usb/host/ehci-pci.c Signed-off-by: Wolfgang Denk <[email protected]>
2011-04-04powerpc: clean up DIU macro definitions for Freescale reference boardsTimur Tabi
Clean up the macro defintions used to enable DIU (video) support on the MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS, which is newer. Add software cursor support to all three boards. Also document the CONFIG_FSL_DIU_FB in the README. Signed-off-by: Timur Tabi <[email protected]> Acked-by: Anatolij Gustschin <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Enable eSDHC boot support on P2020 DSJerry Huang
We implement our own mmc_get_env_addr since the environment variables are written to just after the u-boot image on SDCard, so we must read the MBR to get the start address and code length of the u-boot image, then calculate the address of the env. Signed-off-by: Jerry Huang <[email protected]> Signed-off-by: Zhao Chenhui <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statementsKyle Moffett
The numeric constants in the switch statements are replaced by #defines added to the common ddr_spd.h header. This dramatically improves the readability of the switch statments. In addition, a few of the longer lines were cleaned up, and the DDR2 type for an SO-RDIMM module was added to the DDR2 switch statement. Signed-off-by: Kyle Moffett <[email protected]> Cc: Andy Fleming <[email protected]> Cc: Kim Phillips <[email protected]> Acked-by: York Sun <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Add 36-bit address map support to P1022DSJiang Yutang
Signed-off-by: Jiang Yutang <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Add support for ULI1575 PCI EHCI module on MPC8572DSZhao Chenhui
MPC8572DS provides 2 USB ports with ULI1575. We enable USB storage device support using PCI EHCI module. Signed-off-by: Zhao Chenhui <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Disable ECC in considering performance on MPC8572DSZhao Chenhui
Signed-off-by: Zhao Chenhui <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Replace memctl_intlv_ctl with hwconfig on MPC8572DSZhao Chenhui
Signed-off-by: Zhao Chenhui <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDBPoonam Aggrwal
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs. Signed-off-by: Poonam Aggrwal <[email protected]> Signed-off-by: Priyanka Jain <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Read board switch settings on p1_p2_rdbPriyanka Jain
PCA9557 is parallel I/O expansion device on I2C bus which stores various board switch settings like NOR Flash-Bank selection, SD Data width. On board: switch SW5[6] is to select width for eSDHC ON - 4-bit [Enable eSPI] OFF - 8-bit [Disable eSPI] switch SW4[8] is to select NOR Flash Bank for Booting OFF - Primary Bank ON - Secondary Bank Read board switch settings on p1_p2_rdb and configure corresponding eSDHC width. Signed-off-by: Priyanka Jain <[email protected]> Signed-off-by: Dipen Dudhat <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdbPriyanka Jain
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash boot loaders because: - P1_P2_RDB boards have soldered DDR so no need for SPD - Also P102x has 256K L2 cache size so becomes a limiting factor for size of image that could be loaded in SRAM mode and would require three stage boot loader (TPL). Changes done: 1. CONFIG_SYS_TEXT_BASE to 0x11000000 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc Signed-off-by: Priyanka Jain <[email protected]> Signed-off-by: Poonam Aggrwal <[email protected]> Signed-off-by: Dipen Dudhat <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDBPoonam Aggrwal
Signed-off-by: Poonam Aggrwal <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Refactor Qman/Portal support to be shared between SoCsHaiying Wang
There are some differences between CoreNet (P2040, P3041, P5020, P4080) and and non-CoreNet (P1017, P1023) based SoCs in what features exist and the memory maps. * Rename various immap defines to remove _CORENET_ if they are shared * Added P1023/P1017 specific memory offsets * Only setup LIODNs or LIODN related code on CORENET based SoCs (features doesn't exist on P1023/P1017) Signed-off-by: Haiying Wang <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from boardKumar Gala
Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards pretty much do the same thing. The only variations are in how many controllers or DIMMs per controller exist. To make this work we standardize on the names of the SPD_EEPROM_ADDRESS defines based on the use case of the board. We allow boards to override get_spd to either do board specific fixups to the SPD data or deal with any unique behavior of how the SPD eeproms are wired up. Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()Kumar Gala
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq() and every 86xx board uses get_bus_freq(). If implement get_ddr_freq() as a static inline to call get_bus_freq() we can remove fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq() directly. Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Remove config.mk for nand linker scriptKumar Gala
Move the include of mpc85xx/u-boot-nand.lds to utilize CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Update P2020DS default env settingsLi Yang
Read MAC address from EEPROM. Add hwconfig settings. Modified the default othbootargs to include the cache-sram-size parameter. This parameter is needed as the L2 as SRAM is ON by default in the P2020RDB kernel and used by the Gianfar driver. Also cleanup some of the boot commands. Signed-off-by: Li Yang <[email protected]> Signed-off-by: Zhao Chenhui <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-04powerpc/85xx: Add eSDHC support on P2020DSJerry Huang
We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9 respectively). We enable EXT2, FAT, and parition support for both MMC & USB configs. Signed-off-by: Jerry Huang <[email protected]> Signed-off-by: Jin Qing <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-04-02MIPS: Purple: Remove Purple supportDaniel Schwierzeck
The Purple SoC and eval board are not actively maintained since years. This patch removes the support completely as aggreed with Wolfgang Denk. Signed-off-by: Daniel Schwierzeck <[email protected]> Cc: Wolfgang Denk <[email protected]> Signed-off-by: Shinya Kuribayashi <[email protected]>
2011-04-01NAND: add support for reading ONFI page tableFlorian Fainelli
This patch adds support for reading an ONFI page parameter from a NAND device supporting it. If this is the case, struct nand_chip onfi_version member contains the supported ONFI version, 0 otherwise. This allows NAND drivers past nand_scan_ident to set the best timings for the NAND chip. Signed-off-by: Florian Fainelli <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2011-03-29powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCsPrabhakar Kushwaha
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require that we initialize the SERDES registers if the lanes are configured for PCIe. Additionally these devices PCIe controller do not support ASPM and we have to explicitly disable it. Signed-off-by: Prabhakar Kushwaha <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-03-28powerpc/85xx: Enable various errata on P1022/P1013 SoCsJiang Yutang
Enable workaround for errata ELBC A001, ESDHC 111 & SATA A001 on P1022/P1013 SoCs. Also updated P1022DS config to properly enable CONFIG_FSL_SATA_V2. Signed-off-by: Jiang Yutang <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-03-27Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk
2011-03-27arm: Tegra2: Change mach-type to MACH_TYPE_SEABOARD due to mach-types.h updateTom Warren
Signed-off-by: Tom Warren <[email protected]>
2011-03-27S5P: universal: Enable the pwm driverMinkyu Kang
Signed-off-by: Minkyu Kang <[email protected]>
2011-03-27S5P: goni: Enable the pwm driverMinkyu Kang
Signed-off-by: Minkyu Kang <[email protected]>
2011-03-27S5P: smdkc100: Enable the pwm driverMinkyu Kang
Signed-off-by: Minkyu Kang <[email protected]>
2011-03-27ARM: S5P: pwm driver supportDonghwa Lee
This is common pwm driver of S5P. Signed-off-by: Donghwa Lee <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2011-03-27SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefinedseedshope
Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: Zhong Hongbo <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2011-03-24powerpc/85xx: Fix PCI memory map setup on P1_P2_RDBPrabhakar Kushwaha
Update the PCIe address map to match standard FSL memory map. Additionally, fix the TLBs so the cover the PCIe address space properly so cards plugged in like an e1000 work correctly. Signed-off-by: Prabhakar Kushwaha <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-03-22strmhz: Make hz unsigned to support greater than 2146 MHz clockEd Swarthout
For example, an input of 0x80000000 should print: 2147.484 instead of -2147.-483. Signed-off-by: Ed Swarthout <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2011-03-21mpc52xx, digsy_mtc_rev5: Fix Linux crash, if no Flash in bank 2Heiko Schocher
If no Flash is connected to cs1, Linux crashes, because reg entries are not correct adapted. Following fix is needed: - swap base addresses in CONFIG_SYS_FLASH_BANKS_LIST, as flash bank 1 is on chipselect 0 and flash bank 2 on chipselect 1 - call fdt_fixup_nor_flash_size() from ft_board_setup() Signed-off-by: Heiko Schocher <[email protected]> cc: Wolfgang Denk <[email protected]> cc: Werner Pfister <[email protected]> cc: Detlev Zundel <[email protected]>
2011-03-06powerpc/85xx: Fix pixis_reset altbank mask on MPC8536DSMatthew McClintock
Currently, pixis_reset altbank does not work properly. This patch uses the correct mask to boot into the alternate bank. Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
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