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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.
This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).
Signed-off-by: Kumar Gala <[email protected]>
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Unify with 83xx and 85xx and use CPU_TYPE_ENTRY. We are going to use
this to convey the # of cores and DDR width in the near future so its
good to keep in sync.
Signed-off-by: Kumar Gala <[email protected]>
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The SPI flash define is named CONFIG_SF_DEFAULT_SPEED, not
CONFIG_SF_DEFAULT_HZ, so fix the typos in the Blackfin boards.
Signed-off-by: Mike Frysinger <[email protected]>
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The latest version of U-Boot got a bit fatter in the BSS section which
caused overflows in the RAM region, so increase the monitor size.
Signed-off-by: Mike Frysinger <[email protected]>
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The SPI flash layer is much stricter about sector usage than the eeprom
layer we used to use, so update the env settings to better match the
sector alignment of the flashes we use.
Signed-off-by: Vivi Li <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.
Signed-off-by: Thomas Smits <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This patch adds a egiga driver for the Marvell Kirkwood SoC's.
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed-by: Ronen Shitrit <[email protected]>
Acked-by: Stefan Rose <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Different flavours of DaVinci SOC's have differences in their EMAC IP
This patch does the following
1) Updates base addresses for DM365
2) Updates MDIO frequencies for DM365 and DM646x
3) Update EMAC wrapper registers for DM365 and DM646x
Patch applies to u-boot-net git. the EMAC driver itself
will be updated shortly to add support for DM365 and DM646x
Signed-off-by: Sandeep Paulraj <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: Ben Warren <[email protected]>
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Chips supported:-
1. 88E6161 6 port gbe swtich with 5 integrated PHYs
2. 88E6165 6 port gbe swtich with 5 integrated PHYs
2. 88E6132 3 port gbe swtich with 2 integrated PHYs
Platform specific configuration supported for:-
default or router port vlan configuration
led_init configuration
mdip/n polarity reversal configuration
Note: This driver is supported and tested against
kirkwood egiga interface
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed by: Ronen Shitrit <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Signed-off-by: Zach LeRoy <[email protected]>
Acked-by: Kumar Gala <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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All the Blackfin linker scripts were duplicated across the board dirs with
no difference save from the semi-often used ENV_IS_EMBEDDED option. So
unify all of them in the lib_blackfin/ dir and for the few boards that
need to embedded the environment directly, add a LDS_BOARD_TEXT define for
them to customize via their board config file. This is much simpler than
forcing them to duplicate the rest of the linker script.
Signed-off-by: Mike Frysinger <[email protected]>
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The BF51xF parts have an internal SST SPI flash, so make sure the driver is
enabled by default so we can access it.
Signed-off-by: Mike Frysinger <[email protected]>
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The Blackfin port was using asm/blackfin-config-{pre,post}.h to setup
common Blackfin board defines. The common method now is to use config.h,
so convert blackfin-config-post.h to that. Rename the still Blackfin
specific blackfin-config-pre.h to config-pre.h so the naming conventions
at least line up.
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Allow boards to easily override the root= and default bootcmd, allow
people to tweak the file used in default bootcmds at runtime via one env
var, and add a stock nandboot command.
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Hoan Hoang <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes,
so add a new 'spibootldr' command to take advantage of it.
Signed-off-by: Mike Frysinger <[email protected]>
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Add defines similar to those already used for the the 86xx architecture.
This will ease sharing of PCI code between the 85xx and 86xx
architectures.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The following changes were made to sync up the DMA code between the 85xx
and 86xx architectures which will make it easier to break out common
8xxx DMA code:
85xx:
- Don't set STRANSINT and SPCIORDER fields in SATR register. These bits
only have an affect when the SBPATMU bit is set.
- Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
status register. We may as well clear all 32 bits of the register...
86xx:
- Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
- Add clearing of errors in the DMA status register when initializing
the controller
- Clear the channel start bit in the DMA mode register after a transfer
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to
reduce a large amount of code duplication
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via
UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we
disable UEC6 and UEC8 by default.
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is more accurate.
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.
Signed-off-by: Haiying Wang <[email protected]>
Acked-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.
Signed-off-by: Haiying Wang <[email protected]>
Acked-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Haiying Wang <[email protected]>
Acked-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.
Signed-off-by: Srikanth Srinivasan <[email protected]>
Signed-off-by: Travis Wheatley <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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This patch adds NAND support to the MPC5121ADS board. Please
note that the image size increased since NAND support didn't
fit in the current image size (256k).
Signed-off-by: Stefan Roese <[email protected]>
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Wolfgang Denk <[email protected]>
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MECP5123 is a MPC5121E based module by esd gmbh.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Reinhard Arlt <[email protected]>
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Thos macros will be used by the esd mecp5123 board.
Signed-off-by: Stefan Roese <[email protected]>
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The CPCI750 can be built as CPCI host or adapter/target board. This patch
adds support for runtime detection of those variants.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Reinhard Arlt <[email protected]>
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Signed-off-by: Stefan Roese <[email protected]>
Cc: Reinhard Arlt <[email protected]>
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