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This patch adds a simple pmic driver for the mc34vr500 pmic which
is used in conjunction with the fsl T1 and LS1 series SoC.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add secure boot validation of MC, DPC images using
esbc_validate command.
Signed-off-by: Sumit Garg <[email protected]>
Signed-off-by: Udit Agarwal <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch binds the sys_info->freq_systembus to Platform PLL, and
implements the IPs' clock function individually.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Up to now, there are 3 kind of SoCs under Layerscape Chassis 2,
like LS1043A, LS1046A and LS1012A. But the clocks tree has a
lot of differences, for instance, the IP modules have different
dividers to derive its clock from Platform PLL. And the core
cluster PLL and platform PLL maybe have different reference
clocks, such as LS1012A. Another problem is which clock/PLL
should be described by sys_info->freq_systembus, it is confused
in Layerscape Chissis 2.
This patch is to bind the sys_info->freq_systembus to the Platform
PLL, and handle the different divider of IP modules separately
between different SoCs, and separate reference clocks of core
cluster PLL and platform PLL.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Enable UUID and GPT partition support for NXP's ARM based SoCs
i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A.
Also enable DOS partition for LS1012AFRDM boards.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The patch enables PCIe in ls2080a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The patch enables PCIe and E1000 in ls1043a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The patch enables PCIe and E1000 in ls1012a defconfigs and
removes unused PCIe related macro defines
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The patch enables PCIe in ls1021a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Enable usb feature for ls1046ardb
Signed-off-by: Changming Huang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The SPL load address changes based on boot type in HS devices,
ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs
for similar reasons. Add this same logic for AM33xx devices.
Also make the default value for ISW_ENTRY_ADDR correct for GP
devices based on SoC, HS devices already pick the correct
value in their defconfig.
Signed-off-by: Andrew F. Davis <[email protected]>
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These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.
Signed-off-by: York Sun <[email protected]>
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Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
config header and board header files.
Signed-off-by: York Sun <[email protected]>
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Use Kconfig to select errata workaround.
Signed-off-by: York Sun <[email protected]>
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Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.
Signed-off-by: York Sun <[email protected]>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <[email protected]>
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Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.
Signed-off-by: York Sun <[email protected]>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <[email protected]>
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Use TARGET_T2081QDS from Kconfig instead.
Signed-off-by: York Sun <[email protected]>
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Use TARGET_T2080RDB from Kconfig instead.
Signed-off-by: York Sun <[email protected]>
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Use TARGET_T2080QDS from Kconfig instead.
Signed-off-by: York Sun <[email protected]>
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Use TARGET_T1040QDS from Kconfig instead.
Signed-off-by: York Sun <[email protected]>
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Use TARGET_T1024RDB from Kconfig instead.
Signed-off-by: York Sun <[email protected]>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <[email protected]>
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Use TARGET_T1023RDB from Kconfig instead.
Signed-off-by: York Sun <[email protected]>
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Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.
Signed-off-by: York Sun <[email protected]>
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Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.
Signed-off-by: York Sun <[email protected]>
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Use Kconfig option for E500 and E500MC macros.
Signed-off-by: York Sun <[email protected]>
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According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface writes until the last word of an indirect transfer
otherwise indirect writes is known to fails sometimes. So, make sure
that QSPI indirect writes are 32 bit sized except for the last write. If
the txbuf is unaligned then use bounce buffer to avoid data aborts.
So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER
for all boards that use Cadence QSPI driver.
[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf
Signed-off-by: Vignesh R <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add FIT image booting from MMC device, during MMC bootcmd
u-boot env script look for bootscript, else fit image or else
finally look for legacy image uImage.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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- Add tab space
- remove exctra 'mmc dev ${mmcdev}'
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Enabling FIT along with Signature will make bootm to
not-understanding u-boot legacy image formats like uImage, etc.
So this patch enabling legacy image format for backward compatibility.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Enable Flattened Image Tree support for all Engicam boards.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Add config options for booting Linux from NAND in UBI format.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Create ubifs.img:
$ mkfs.ubifs -q -r /rootfs -m 4096 -e 253952 -c 7936 -o ubifs.img
Write ubifs.img:
---------------
icorem6qdl> nand erase.part rootfs
icorem6qdl> ubi part rootfs
icorem6qdl> ubi create rootfs
icorem6qdl> ext4load mmc 0:2 ${loadaddr} ubifs.img
166592512 bytes read in 8091 ms (19.6 MiB/s)
icorem6qdl> ubi write ${loadaddr} rootfs ${filesize}
166592512 bytes written to volume rootfs
icorem6qdl> ubifsmount ubi0:rootfs
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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gpmi-nand is the proper name used in nand driver from Linux for all
imx related nand boards, so rename mtdparts name as gpmi-nand instead
of nand, this will eventually reflects all nand info to Linux from
u-boot like mtdparts.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Boot Linux with uImage instead of zImage, so update
bootz with bootm.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Increase the nand kernel partition size, for supporting
large uImage files, maximum 8MiB.
Cc: Stefano Babic <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Modify U-Boot default env settings.
Boot sequence:
1. SD card boot script
2. SD card boot no script
3. SATA boot script
4. SATA boot no script
5. eMMC boot script
6. eMMC boot no script
Signed-off-by: Uri Mashiach <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add MAC support.
Use PHY, connected to RGMII1 as a default Eth adapter,
by appropriate setting of 'cpsw_data.active_slave'.
'cpsw_phy' env variable can override this setting.
Set the MAC addresses in the U-Boot environment.
The addresses are retrieved from the on-board EEPROM or from the SOC's
MAC fuses.
Set the following PHYs RGMII clock delays:
- Enable RX delay
- Disable TX delay
Signed-off-by: Dmitry Lifshitz <[email protected]>
[[email protected]: add RGMII clock delays]
Signed-off-by: Uri Mashiach <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add PCB revision message.
Implement board revision get_board_rev API.
Signed-off-by: Dmitry Lifshitz <[email protected]>
Commit description update.
Signed-off-by: Uri Mashiach <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Features supported :
* Serial console
* SPI Flash
* MMC/SD Card
* eMMC storage
* SATA
* PCA9555 - GPIO expander over I2C5 bus
* USB
Use spl alternate boot device feature to define fallback to
the main boot device as it is defined by hardware.
Signed-off-by: Dmitry Lifshitz <[email protected]>
[[email protected]: Adjust to v2016.11]
Signed-off-by: Uri Mashiach <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
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The display is done in the device tree now, and there is no need
to pass 'display' kernel parameter any longer.
Signed-off-by: Adam Ford <[email protected]>
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These boards do not and never have had ONENAND support, so let's remove it.
Signed-off-by: Adam Ford <[email protected]>
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Enable USB gadget ethernet by default to have networking capabilities.
Tested using DHCP and TFTP to transfer kernel, DT, ramdisk.
Cc: Fabio Estevam <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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'fdtfile' is the preferred name for the variable that contains the
device tree blob according to the README file.
It also makes it consistent with other i.MX boards that use config_distro,
so change it accordingly.
Signed-off-by: Fabio Estevam <[email protected]>
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When we want to use Secure Boot with HAB from SPL over U-Boot.img,
we need to append the IVT to the image and leave space for the CSF.
Images generated as firmware_ivt can directly be signed using the
Freescale code signing tool. For creation of a CSF, mkimage outputs
the correct HAB Blocks for the image.
The changes to the usual firmware image class are quite small,
that is why I implemented that directly into the default_image.
Cc: [email protected]
v2-Changes: None
Signed-off-by: Sven Ebenfeld <[email protected]>
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
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When using HAB as secure boot mechanism on Wandboard, the chain of
trust breaks immediately after the SPL. As this is not checking
the authenticity of the loaded image before jumping to it.
The HAB status output will not be implemented in SPL as it adds
a lot of strings that are only required in debug cases. With those
it exceeds the maximum size of the available OCRAM (69 KiB).
The SPL MISC driver support must be enabled, so that the driver can use OTP fuse
to check if HAB is enabled.
Cc: [email protected]
v2-Changes: None
Signed-off-by: Sven Ebenfeld <[email protected]>
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
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This is a user-unconfigurable option that is selected by the
drivers that need to overwrite SDHCI IO memory accessors.
(BCM2835 SDHCI seems the only driver that needs to do so.)
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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While I moved the options, I also renamed them so that they are all
prefixed with MMC_SDHCI_.
This commit was created in the following steps.
[1] Rename with the following command
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_MMC_SDMA/CONFIG_MMC_SDHCI_SDMA/g
s/CONFIG_BCM2835_SDHCI/CONFIG_MMC_SDHCI_BCM2835/g
s/CONFIG_KONA_SDHCI/CONFIG_MMC_SDHCI_KONA/g
s/CONFIG_MV_SDHCI/CONFIG_MMC_SDHCI_MV/g
s/CONFIG_S5P_SDHCI/CONFIG_MMC_SDHCI_S5P/g
s/CONFIG_SPEAR_SDHCI/CONFIG_MMC_SDHCI_SPEAR/g
'
[2] create the Kconfig entries in drivers/mmc/Kconfig
[3] Move the options by the following command
tools/moveconfig.py -y MMC_SDHCI_SDMA MMC_SDHCI_BCM2835 \
MMC_SDHCI_KONA MMC_SDHCI_MV MMC_SDHCI_S5P MMC_SDHCI_SPEAR
[4] Sort drivers/mmc/Makefile for readability
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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